From patchwork Thu Apr 9 14:58:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris BREZILLON X-Patchwork-Id: 6188471 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D37949F2E9 for ; Thu, 9 Apr 2015 15:04:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E504D2037B for ; Thu, 9 Apr 2015 15:04:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0ED092037A for ; Thu, 9 Apr 2015 15:04:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YgDxo-0007qn-Ru; Thu, 09 Apr 2015 15:01:52 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YgDvE-0004m1-UG for linux-arm-kernel@lists.infradead.org; Thu, 09 Apr 2015 14:59:14 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A538C924; Thu, 9 Apr 2015 16:58:55 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 293D9920; Thu, 9 Apr 2015 16:58:49 +0200 (CEST) From: Boris Brezillon To: Herbert Xu , "David S. Miller" , linux-crypto@vger.kernel.org Subject: [PATCH 2/2] crypto: marvell/CESA: update DT bindings documentation Date: Thu, 9 Apr 2015 16:58:43 +0200 Message-Id: <1428591523-1780-3-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1428591523-1780-1-git-send-email-boris.brezillon@free-electrons.com> References: <1428591523-1780-1-git-send-email-boris.brezillon@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150409_075913_330017_BB53FC2D X-CRM114-Status: GOOD ( 11.41 ) X-Spam-Score: -0.0 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , Pawel Moll , Ian Campbell , Boris Brezillon , Arnaud Ebalard , linux-kernel@vger.kernel.org, Eran Ben-Avi , Nadav Haklai , Lior Amsalem , Rob Herring , Andrew Lunn , Kumar Gala , Gregory CLEMENT , Sebastian Hesselbarth , linux-arm-kernel@lists.infradead.org, Jason Cooper X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Document new compatible strings, document the new method to reference the crypto SRAM and deprecate the old one and document the the 'clocks' and 'clock-names' properties. Signed-off-by: Boris Brezillon --- .../devicetree/bindings/crypto/mv_cesa.txt | 50 ++++++++++++++++------ 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt index 47229b1..4ce9bc5 100644 --- a/Documentation/devicetree/bindings/crypto/mv_cesa.txt +++ b/Documentation/devicetree/bindings/crypto/mv_cesa.txt @@ -1,20 +1,46 @@ Marvell Cryptographic Engines And Security Accelerator Required properties: -- compatible : should be "marvell,orion-crypto" -- reg : base physical address of the engine and length of memory mapped - region, followed by base physical address of sram and its memory - length -- reg-names : "regs" , "sram"; -- interrupts : interrupt number +- compatible: should be one of the following string + "marvell,orion-crypto" + "marvell,kirkwood-crypto" + "marvell,armada-370-crypto" + "marvell,armada-xp-crypto" + "marvell,armada-375-crypto" + "marvell,armada-38x-crypto" +- reg: base physical address of the engine and length of memory mapped + region +- reg-names: "regs" +- interrupts: interrupt number +- clocks: reference to the crypto engines clocks. This property is not + required for orion and kirkwood platforms +- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine + id. + This property is not required for the orion and kirkwoord + platforms. + "cesazX" clocks are not required on armada-370 platforms +- marvell,crypto-srams: phandle to crypto SRAM definitions + +Optional properties: +- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not + specified the whole SRAM is used (2KB) + +Deprecated properties: +- reg: base physical address of the engine and length of memory mapped + region, followed by base physical address of sram and its memory + length +- reg-names: "regs" , "sram" Examples: - crypto@30000 { - compatible = "marvell,orion-crypto"; - reg = <0x30000 0x10000>, - <0x4000000 0x800>; - reg-names = "regs" , "sram"; - interrupts = <22>; + crypto@90000 { + compatible = "marvell,armada-xp-crypto"; + reg = <0x90000 0x10000>; + reg-names = "regs"; + interrupts = <48>, <49>; + clocks = <&gateclk 23>, <&gateclk 23>; + clock-names = "cesa0", "cesa1"; + marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>; + marvell,crypto-sram-size = <0x600>; status = "okay"; };