| Message ID | 1429027519-22209-1-git-send-email-dinguyen@opensource.altera.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 04/14, dinguyen@opensource.altera.com wrote: > From: Dinh Nguyen <dinguyen@opensource.altera.com> > > The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock > which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk > passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided > node and makes the sdmmc_clk it's parent. > > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> > --- Is this a fix of some sort? I'm confused why this was sent to the clk maintainers when it seems to be more appropriate to go through the arm-soc tree.
On 5/13/15 2:54 AM, Stephen Boyd wrote: > On 04/14, dinguyen@opensource.altera.com wrote: >> From: Dinh Nguyen <dinguyen@opensource.altera.com> >> >> The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock >> which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk >> passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided >> node and makes the sdmmc_clk it's parent. >> >> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> >> --- > > Is this a fix of some sort? I'm confused why this was sent to the > clk maintainers when it seems to be more appropriate to go > through the arm-soc tree. > Ok, sorry about that. I thought since it was clock nodes, it would appropriate to CC clk maintainers. BTW, can I take patches from drivers/clk/socfpga/* through the arm-soc tree or would that go through you guys? Thanks, Dinh
On 05/13, Dinh Nguyen wrote: > > > On 5/13/15 2:54 AM, Stephen Boyd wrote: > > On 04/14, dinguyen@opensource.altera.com wrote: > >> From: Dinh Nguyen <dinguyen@opensource.altera.com> > >> > >> The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock > >> which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk > >> passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided > >> node and makes the sdmmc_clk it's parent. > >> > >> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> > >> --- > > > > Is this a fix of some sort? I'm confused why this was sent to the > > clk maintainers when it seems to be more appropriate to go > > through the arm-soc tree. > > > > Ok, sorry about that. I thought since it was clock nodes, it would > appropriate to CC clk maintainers. Sure, Cc is fine, but I believe the mail was sent "To" us so that led to my confusion. > > BTW, can I take patches from drivers/clk/socfpga/* through the arm-soc > tree or would that go through you guys? > Unless there's some sort of complicated dependency between the clk tree and the arm-soc tree I'd prefer any patches against drivers/clk/* go through the clk tree.
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index d9176e6..be4beda 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -451,6 +451,14 @@ clk-phase = <0 135>; }; + sdmmc_clk_divided: sdmmc_clk_divided { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&sdmmc_clk>; + clk-gate = <0xa0 8>; + fixed-divider = <4>; + }; + nand_x_clk: nand_x_clk { #clock-cells = <0>; compatible = "altr,socfpga-gate-clk"; @@ -635,7 +643,7 @@ fifo-depth = <0x400>; #address-cells = <1>; #size-cells = <0>; - clocks = <&l4_mp_clk>, <&sdmmc_clk>; + clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>; clock-names = "biu", "ciu"; };