diff mbox

ARM: sunxi: dts: Add A10 uarts pin muxing options

Message ID 1430043338-28982-1-git-send-email-richard.genoud@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Richard Genoud April 26, 2015, 10:15 a.m. UTC 
The A10 has 8 uarts, only uart0 and uart1 where filled.
This patch adds all the missing uarts(2 to 7) pin muxing to the dtsi.

Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
---
 arch/arm/boot/dts/sun4i-a10.dtsi |   84 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 84 insertions(+)

Based on V4.0
uart4_a tested on cubieboard A10

Comments

Maxime Ripard April 26, 2015, 4:11 p.m. UTC | #1 
Hi Richard,

On Sun, Apr 26, 2015 at 12:15:38PM +0200, Richard Genoud wrote:
> The A10 has 8 uarts, only uart0 and uart1 where filled.
> This patch adds all the missing uarts(2 to 7) pin muxing to the dtsi.
> 
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>

It's obviously correct, but I'd rather not add new pinctrl nodes that
don't have any users so that it doesn't bloat the DT without any
particular reason.

Feel free to resubmit this patch if one of these nodes become actually
useful.

Thanks!
Maxime
Richard Genoud April 27, 2015, 6:36 a.m. UTC | #2 
2015-04-26 18:11 GMT+02:00 Maxime Ripard <maxime.ripard@free-electrons.com>:
> Hi Richard,
>
> On Sun, Apr 26, 2015 at 12:15:38PM +0200, Richard Genoud wrote:
>> The A10 has 8 uarts, only uart0 and uart1 where filled.
>> This patch adds all the missing uarts(2 to 7) pin muxing to the dtsi.
>>
>> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
>
> It's obviously correct, but I'd rather not add new pinctrl nodes that
> don't have any users so that it doesn't bloat the DT without any
> particular reason.
>
> Feel free to resubmit this patch if one of these nodes become actually
> useful.

Ok, I'll resend-it with only the uarts accessible via the cubieboard
A10 expansion headers.
Maxime Ripard April 27, 2015, 9:52 a.m. UTC | #3 
On Mon, Apr 27, 2015 at 08:36:02AM +0200, Richard Genoud wrote:
> 2015-04-26 18:11 GMT+02:00 Maxime Ripard <maxime.ripard@free-electrons.com>:
> > Hi Richard,
> >
> > On Sun, Apr 26, 2015 at 12:15:38PM +0200, Richard Genoud wrote:
> >> The A10 has 8 uarts, only uart0 and uart1 where filled.
> >> This patch adds all the missing uarts(2 to 7) pin muxing to the dtsi.
> >>
> >> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
> >
> > It's obviously correct, but I'd rather not add new pinctrl nodes that
> > don't have any users so that it doesn't bloat the DT without any
> > particular reason.
> >
> > Feel free to resubmit this patch if one of these nodes become actually
> > useful.
> 
> Ok, I'll resend-it with only the uarts accessible via the cubieboard
> A10 expansion headers.

If you're not going to add new users for these nodes either, don't
bother.

Maxime
diff mbox

Patch

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index eebb785..e83fd2c 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -673,6 +673,90 @@ 
 				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 			};
 
+			uart2_pins_a: uart2@0 {
+				allwinner,pins = "PA2", "PA3";
+				allwinner,function = "uart2";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart2_pins_b: uart2@1 {
+				allwinner,pins = "PI18", "PI19";
+				allwinner,function = "uart2";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart3_pins_a: uart3@0 {
+				allwinner,pins = "PG6", "PG7";
+				allwinner,function = "uart3";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart3_pins_b: uart3@1 {
+				allwinner,pins = "PH0", "PH1";
+				allwinner,function = "uart3";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart4_pins_a: uart4@0 {
+				allwinner,pins = "PG10", "PG11";
+				allwinner,function = "uart4";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart4_pins_b: uart4@1 {
+				allwinner,pins = "PH4", "PH5";
+				allwinner,function = "uart4";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart5_pins_a: uart5@0 {
+				allwinner,pins = "PH6", "PH7";
+				allwinner,function = "uart5";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart5_pins_b: uart5@1 {
+				allwinner,pins = "PI10", "PI11";
+				allwinner,function = "uart5";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart6_pins_a: uart6@0 {
+				allwinner,pins = "PA12", "PA13";
+				allwinner,function = "uart6";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart6_pins_b: uart6@1 {
+				allwinner,pins = "PI12", "PI13";
+				allwinner,function = "uart6";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart7_pins_a: uart7@0 {
+				allwinner,pins = "PA14", "PA15";
+				allwinner,function = "uart7";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
+			uart7_pins_b: uart7@1 {
+				allwinner,pins = "PI20", "PI21";
+				allwinner,function = "uart7";
+				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+			};
+
 			i2c0_pins_a: i2c0@0 {
 				allwinner,pins = "PB0", "PB1";
 				allwinner,function = "i2c0";