From patchwork Sun Apr 26 14:31:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 6276891 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 32DA29F389 for ; Sun, 26 Apr 2015 14:41:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F091F20121 for ; Sun, 26 Apr 2015 14:41:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE32A20376 for ; Sun, 26 Apr 2015 14:41:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YmNh5-0004gN-7v; Sun, 26 Apr 2015 14:38:03 +0000 Received: from mail-pd0-f170.google.com ([209.85.192.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YmNds-0001G4-Ol for linux-arm-kernel@lists.infradead.org; Sun, 26 Apr 2015 14:34:46 +0000 Received: by pdbqd1 with SMTP id qd1so100591544pdb.2 for ; Sun, 26 Apr 2015 07:34:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9QSYHtOZ1CStpD+dcyQQnMWV7GS9LswCBokQU1FKfn8=; b=NUeCyYrwp0E5o0lPUJnbftvmNtXXJP/ieDgMpRlcEEsLMjbBU2gtZF7gpV95wSm0c0 V7kClJQ++5Ufx6wOWlaNBhNWMfjMeXs69u/kUpVBvhPQwsoftWrtjRfFHq7PHWj2f/7X m/ktjJhYickj0ijffjnkXlulZXQZec1r5TDw6V1HSJryL+0V9rVwuaW6VTynLPNaGMZt zLWZ/ddwgqcsUACj7V7Culc+ZqLWM/fag7Pn92tCCCLfthoS2EnOZ/ribNWjbaYzdxPq 1aqNHL5cXPR3JCYYItymzSwZYHsWVsIKzu0EAyzKsdTA4g40mLDAu/hLlPnXDeKc8Opi k/kQ== X-Gm-Message-State: ALoCoQm+1fWkDPSFu7hiMrmLRtmnoPN0UTJI2G2NjITGt8gNZzdUDJ7+jCuNr3wBBmTF9VBN5UPf X-Received: by 10.68.205.197 with SMTP id li5mr14045182pbc.4.1430058862746; Sun, 26 Apr 2015 07:34:22 -0700 (PDT) Received: from localhost.localdomain ([104.207.83.1]) by mx.google.com with ESMTPSA id x2sm16622905pdm.40.2015.04.26.07.34.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Apr 2015 07:34:22 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/11] ARM: imx: remove inclusions of platform headers Date: Sun, 26 Apr 2015 22:31:10 +0800 Message-Id: <1430058672-9267-10-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430058672-9267-1-git-send-email-shawn.guo@linaro.org> References: <1430058672-9267-1-git-send-email-shawn.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150426_073444_906636_7BF503E0 X-CRM114-Status: GOOD ( 12.62 ) X-Spam-Score: -0.9 (/) Cc: Frank Li , Stephen Boyd , Russell King , kernel@pengutronix.de, Mike Turquette , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP With the cleanup done before, we now can simply define base address and irq as needed in clock driver, to get those platform header inclusions removed. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx1.c | 7 +++++-- arch/arm/mach-imx/clk-imx21.c | 7 +++++-- arch/arm/mach-imx/clk-imx25.c | 2 -- arch/arm/mach-imx/clk-imx27.c | 8 ++++++-- arch/arm/mach-imx/clk-imx31.c | 21 +++++++++++++++++---- arch/arm/mach-imx/clk-imx35.c | 20 +++++++++++++++++--- arch/arm/mach-imx/clk-imx51-imx53.c | 3 +-- arch/arm/mach-imx/clk-imx6q.c | 3 +-- arch/arm/mach-imx/clk-imx6sl.c | 1 - arch/arm/mach-imx/clk-imx6sx.c | 1 - arch/arm/mach-imx/clk-pllv1.c | 2 -- arch/arm/mach-imx/clk.h | 7 +++++++ 12 files changed, 59 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 9e68351bb72c..c9812dbacac2 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -23,10 +23,13 @@ #include #include #include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX1_CCM_BASE_ADDR 0x0021b000 +#define MX1_TIM1_BASE_ADDR 0x00220000 +#define MX1_TIM1_INT (NR_IRQS_LEGACY + 59) static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", }; static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index bc4254dd40a1..0ca842cf4ca7 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -15,10 +15,13 @@ #include #include #include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX21_CCM_BASE_ADDR 0x10027000 +#define MX21_GPT1_BASE_ADDR 0x10003000 +#define MX21_INT_GPT1 (NR_IRQS_LEGACY + 26) static void __iomem *ccm __initdata; diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 485d090d2267..ec1a4c1dacf1 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -28,8 +28,6 @@ #include #include "clk.h" -#include "common.h" -#include "hardware.h" #define CCM_MPCTL 0x00 #define CCM_UPCTL 0x04 diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 530af09c6bc7..df2dfc081c71 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -5,10 +5,14 @@ #include #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX27_CCM_BASE_ADDR 0x10027000 +#define MX27_GPT1_BASE_ADDR 0x10003000 +#define MX27_INT_GPT1 (NR_IRQS_LEGACY + 26) static void __iomem *ccm __initdata; diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index caa26ec32152..a55290c1c264 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -21,12 +21,25 @@ #include #include #include +#include +#include #include "clk.h" -#include "common.h" -#include "crmregs-imx3.h" -#include "hardware.h" -#include "mx31.h" + +#define MX31_CCM_BASE_ADDR 0x53f80000 +#define MX31_GPT1_BASE_ADDR 0x53f90000 +#define MX31_INT_GPT (NR_IRQS_LEGACY + 29) + +#define MXC_CCM_CCMR 0x00 +#define MXC_CCM_PDR0 0x04 +#define MXC_CCM_PDR1 0x08 +#define MXC_CCM_MPCTL 0x10 +#define MXC_CCM_UPCTL 0x14 +#define MXC_CCM_SRPCTL 0x18 +#define MXC_CCM_CGR0 0x20 +#define MXC_CCM_CGR1 0x24 +#define MXC_CCM_CGR2 0x28 +#define MXC_CCM_PMCR0 0x5c static const char *mcu_main_sel[] = { "spll", "mpll", }; static const char *per_sel[] = { "per_div", "ipg", }; diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index f53d2b502479..bb0a39158f04 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -13,11 +13,25 @@ #include #include #include +#include +#include -#include "crmregs-imx3.h" #include "clk.h" -#include "common.h" -#include "hardware.h" + +#define MX35_CCM_BASE_ADDR 0x53f80000 +#define MX35_GPT1_BASE_ADDR 0x53f90000 +#define MX35_INT_GPT (NR_IRQS_LEGACY + 29) + +#define MXC_CCM_PDR0 0x04 +#define MX35_CCM_PDR2 0x0c +#define MX35_CCM_PDR3 0x10 +#define MX35_CCM_PDR4 0x14 +#define MX35_CCM_MPCTL 0x1c +#define MX35_CCM_PPCTL 0x20 +#define MX35_CCM_CGR0 0x2c +#define MX35_CCM_CGR1 0x30 +#define MX35_CCM_CGR2 0x34 +#define MX35_CCM_CGR3 0x38 struct arm_ahb_div { unsigned char arm, ahb, sel; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index f341464fe7e9..a7e4f394be0d 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -16,11 +16,10 @@ #include #include #include +#include #include #include "clk.h" -#include "common.h" -#include "hardware.h" #define MX51_DPLL1_BASE 0x83f80000 #define MX51_DPLL2_BASE 0x83f84000 diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index d0135c62d21a..128f8871cbd8 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -19,11 +19,10 @@ #include #include #include +#include #include #include "clk.h" -#include "common.h" -#include "hardware.h" static const char *step_sels[] = { "osc", "pll2_pfd2_396m", }; static const char *pll1_sw_sels[] = { "pll1_sys", "step", }; diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c index 3aef26464110..a0d4cf26cfa9 100644 --- a/arch/arm/mach-imx/clk-imx6sl.c +++ b/arch/arm/mach-imx/clk-imx6sl.c @@ -16,7 +16,6 @@ #include #include "clk.h" -#include "common.h" #define CCSR 0xc #define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2) diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 151460a95130..bf04ad5056d4 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -21,7 +21,6 @@ #include #include "clk.h" -#include "common.h" #define CCDR 0x4 #define BM_CCM_CCDR_MMDC_CH0_MASK (0x2 << 16) diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 4e1cb9f39a29..c34ad8a611dd 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -6,8 +6,6 @@ #include #include "clk.h" -#include "common.h" -#include "hardware.h" /** * pll v1 diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index b5297e457a8e..6bae5374dc83 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -6,6 +6,13 @@ extern spinlock_t imx_ccm_lock; +/* + * This is a stop-gap solution for clock drivers like imx1/imx21 which call + * mxc_timer_init() to initialize timer for non-DT boot. It can be removed + * when these legacy non-DT support is converted or dropped. + */ +void mxc_timer_init(unsigned long pbase, int irq); + void imx_check_clocks(struct clk *clks[], unsigned int count); extern void imx_cscmr1_fixup(u32 *val);