From patchwork Tue Apr 28 04:19:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 6285391 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2A29ABEEE1 for ; Tue, 28 Apr 2015 04:23:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2F59520379 for ; Tue, 28 Apr 2015 04:23:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1F10B20376 for ; Tue, 28 Apr 2015 04:23:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ymx0x-0004oD-4z; Tue, 28 Apr 2015 04:20:55 +0000 Received: from mail-wi0-x235.google.com ([2a00:1450:400c:c05::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ymx0K-0003Wj-B0 for linux-arm-kernel@lists.infradead.org; Tue, 28 Apr 2015 04:20:17 +0000 Received: by wicmx19 with SMTP id mx19so98434895wic.1 for ; Mon, 27 Apr 2015 21:19:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uBhM1fdSwQJ2kqmEvFUk3jgzn+CILTOOhKrUDlmX/zE=; b=oLhWh/Q6efYkEkkefUZefvMFKi3W3iWMQ3B2WmVOp6JtrDZYXbM4vsbbV4mNYPKrEH S3AMhGvngFXjhrh23jxzxyVhGK/TBmV35sOnrMCFG6gcaJoldM0Wop7RVeQyfSvR+8+p eeK6hPN4tbMiFuJ28eKGsWqwGpWxrOvXe6wu18gcDqA0Z9iUOrRbk6H9xg5F56AWlGk4 3sm4mMQvDkz83jaR3e8zpPzBQT7FA6aW1a1r3WfNPX02PwF0A7cVXJVVrTuXtimkBskm ki/TEPE5ew0Kj76fXE4z6huV6DCHcvudsgVJm09iOLvfPwVXDUxe6XqES+97O7LQk4Pb RoLQ== X-Received: by 10.180.88.99 with SMTP id bf3mr26128932wib.75.1430194792543; Mon, 27 Apr 2015 21:19:52 -0700 (PDT) Received: from fangorn.rup.mentorg.com (nat-min.mentorg.com. [139.181.32.34]) by mx.google.com with ESMTPSA id dz4sm14353218wib.17.2015.04.27.21.19.50 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Apr 2015 21:19:51 -0700 (PDT) From: Dmitry Eremin-Solenikov To: Russell King Subject: [PATCH 3/5] ARM: sa1100: use ioremapped memory to access SC registers Date: Tue, 28 Apr 2015 07:19:30 +0300 Message-Id: <1430194772-28474-3-git-send-email-dbaryshkov@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1430194772-28474-1-git-send-email-dbaryshkov@gmail.com> References: <1430194772-28474-1-git-send-email-dbaryshkov@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150427_212016_578689_1A384461 X-CRM114-Status: GOOD ( 15.04 ) X-Spam-Score: -0.8 (/) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use ioremap() and readl/writel_relaxed() to access IRQ controller registers. Signed-off-by: Dmitry Eremin-Solenikov --- arch/arm/mach-sa1100/irq.c | 52 ++++++++++++++++++++++++++++++---------------- 1 file changed, 34 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 6afaa33..08f929e 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -20,13 +20,19 @@ #include -#include #include -#include #include #include "generic.h" +#define ICIP 0x00 /* IC IRQ Pending reg. */ +#define ICMR 0x04 /* IC Mask Reg. */ +#define ICLR 0x08 /* IC Level Reg. */ +#define ICCR 0x0C /* IC Control Reg. */ +#define ICFP 0x10 /* IC FIQ Pending reg. */ +#define ICPR 0x20 /* IC Pending Reg. */ + +static void __iomem *iobase; /* * We don't need to ACK IRQs on the SA1100 unless they're GPIOs @@ -34,12 +40,20 @@ */ static void sa1100_mask_irq(struct irq_data *d) { - ICMR &= ~BIT(d->hwirq); + u32 reg; + + reg = readl_relaxed(iobase + ICMR); + reg &= ~BIT(d->hwirq); + writel_relaxed(reg, iobase + ICMR); } static void sa1100_unmask_irq(struct irq_data *d) { - ICMR |= BIT(d->hwirq); + u32 reg; + + reg = readl_relaxed(iobase + ICMR); + reg |= BIT(d->hwirq); + writel_relaxed(reg, iobase + ICMR); } static int sa1100_set_wake(struct irq_data *d, unsigned int on) @@ -87,16 +101,14 @@ static int sa1100irq_suspend(void) struct sa1100irq_state *st = &sa1100irq_state; st->saved = 1; - st->icmr = ICMR; - st->iclr = ICLR; - st->iccr = ICCR; + st->icmr = readl_relaxed(iobase + ICMR); + st->iclr = readl_relaxed(iobase + ICLR); + st->iccr = readl_relaxed(iobase + ICCR); /* * Disable all GPIO-based interrupts. */ - ICMR &= ~(IC_GPIO11_27|IC_GPIO10|IC_GPIO9|IC_GPIO8|IC_GPIO7| - IC_GPIO6|IC_GPIO5|IC_GPIO4|IC_GPIO3|IC_GPIO2| - IC_GPIO1|IC_GPIO0); + writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); return 0; } @@ -106,10 +118,10 @@ static void sa1100irq_resume(void) struct sa1100irq_state *st = &sa1100irq_state; if (st->saved) { - ICCR = st->iccr; - ICLR = st->iclr; + writel_relaxed(st->iccr, iobase + ICCR); + writel_relaxed(st->iclr, iobase + ICLR); - ICMR = st->icmr; + writel_relaxed(st->icmr, iobase + ICMR); } } @@ -132,8 +144,8 @@ sa1100_handle_irq(struct pt_regs *regs) uint32_t icip, icmr, mask; do { - icip = (ICIP); - icmr = (ICMR); + icip = readl_relaxed(iobase + ICIP); + icmr = readl_relaxed(iobase + ICMR); mask = icip & icmr; if (mask == 0) @@ -148,17 +160,21 @@ void __init sa1100_init_irq(void) { request_resource(&iomem_resource, &irq_resource); + iobase = ioremap(irq_resource.start, SZ_64K); + if (WARN_ON(!iobase)) + return; + /* disable all IRQs */ - ICMR = 0; + writel_relaxed(0, iobase + ICMR); /* all IRQs are IRQ, not FIQ */ - ICLR = 0; + writel_relaxed(0, iobase + ICLR); /* * Whatever the doc says, this has to be set for the wait-on-irq * instruction to work... on a SA1100 rev 9 at least. */ - ICCR = 1; + writel_relaxed(1, iobase + ICCR); sa1100_normal_irqdomain = irq_domain_add_simple(NULL, 32, IRQ_GPIO0_SC,