diff mbox

[2/2] arm64: dts: mt8173: Fixup pinctrl nodes

Message ID 1430213037-23831-2-git-send-email-yingjoe.chen@mediatek.com (mailing list archive)
State New, archived
Headers show

Commit Message

Yingjoe Chen April 28, 2015, 9:23 a.m. UTC
The 8173 pinctrl node doesn't follow dts convention. Fix them.
Also add a comment to explain pinctrl register usage to make it
more clear.

Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

Comments

Daniel Kurtz April 30, 2015, 6:38 a.m. UTC | #1
On Tue, Apr 28, 2015 at 5:23 PM, Yingjoe Chen <yingjoe.chen@mediatek.com> wrote:
>
> The 8173 pinctrl node doesn't follow dts convention. Fix them.
> Also add a comment to explain pinctrl register usage to make it
> more clear.
>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>

Thanks for the fix.

Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>

>
> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 8346c0f..e4a30cd 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -128,6 +128,7 @@
>                 compatible = "simple-bus";
>                 ranges;
>
> +               /* Provide regmap for pinctrl driver */
>                 syscfg_pctl_a: syscfg_pctl_a@10005000 {
>                         compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
>                         reg = <0 0x10005000 0 0x1000>;
> @@ -159,9 +160,13 @@
>                         #reset-cells = <1>;
>                 };
>
> -               pio: pinctrl@0x10005000 {
> +               /*
> +                * Pinctrl access register at 0x10005000 through regmap.
> +                * Register 0x1000b000 is used by EINT.
> +                */
> +               pio: pinctrl@10005000 {
>                         compatible = "mediatek,mt8173-pinctrl";
> -                       reg = <0 0x1000B000 0 0x1000>;
> +                       reg = <0 0x1000b000 0 0x1000>;
>                         mediatek,pctl-regmap = <&syscfg_pctl_a>;
>                         pins-are-numbered;
>                         gpio-controller;
> @@ -169,8 +174,8 @@
>                         interrupt-controller;
>                         #interrupt-cells = <2>;
>                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
> -                                               <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> -                                               <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +                                    <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
> +                                    <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
>                 };
>
>                 sysirq: intpol-controller@10200620 {
> --
> 1.8.1.1.dirty
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
diff mbox

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 8346c0f..e4a30cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -128,6 +128,7 @@ 
 		compatible = "simple-bus";
 		ranges;
 
+		/* Provide regmap for pinctrl driver */
 		syscfg_pctl_a: syscfg_pctl_a@10005000 {
 			compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
 			reg = <0 0x10005000 0 0x1000>;
@@ -159,9 +160,13 @@ 
 			#reset-cells = <1>;
 		};
 
-		pio: pinctrl@0x10005000 {
+		/*
+		 * Pinctrl access register at 0x10005000 through regmap.
+		 * Register 0x1000b000 is used by EINT.
+		 */
+		pio: pinctrl@10005000 {
 			compatible = "mediatek,mt8173-pinctrl";
-			reg = <0 0x1000B000 0 0x1000>;
+			reg = <0 0x1000b000 0 0x1000>;
 			mediatek,pctl-regmap = <&syscfg_pctl_a>;
 			pins-are-numbered;
 			gpio-controller;
@@ -169,8 +174,8 @@ 
 			interrupt-controller;
 			#interrupt-cells = <2>;
 			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
-						<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
-						<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		sysirq: intpol-controller@10200620 {