From patchwork Wed Apr 29 17:16:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6297671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BA2659F1C2 for ; Wed, 29 Apr 2015 17:36:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CBD272018E for ; Wed, 29 Apr 2015 17:36:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C527220122 for ; Wed, 29 Apr 2015 17:36:33 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnVsU-00020u-1I; Wed, 29 Apr 2015 17:34:30 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnVsP-0001yh-Hi for linux-arm-kernel@bombadil.infradead.org; Wed, 29 Apr 2015 17:34:25 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnVbw-0008J0-Fn for linux-arm-kernel@lists.infradead.org; Wed, 29 Apr 2015 17:17:28 +0000 Received: by pdbqa5 with SMTP id qa5so33975754pdb.1 for ; Wed, 29 Apr 2015 10:17:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+eMBvQyKGk6+C/PbGi+7PdmJj0Aenbrptr8/Uh2HOTU=; b=gcJuPYiNHE5IHvx0UvWHophU3nwjHtzjInKSWXxME/ZojuRF+d9Og2DNS7Jq0eA2wz WMRrWW1iF3iEHboQ/n9/Bw1LAbNQTtUrlkzK/2aENIgyoo4PYmWWoDjwvBikaGHqJpzZ TMmFXylIlxjDtF9ZmGlQGoIrNv1D365aRgVuv0HYhGg9z/MYzsqKg62BqBZnrBnSPAMD Anido5RbEg9QiNCtjfEEhPPbgtzW4d+rJrIZrE/eyaEn34duXz48anX+sFpAmyjsAYR6 S00j0x1Lhbn8lH9GUM4FfySeyv6ouoL1UijxYWyJdb2pX7BvL1B9EKGL9S+RZm56Gsn7 gM9Q== X-Gm-Message-State: ALoCoQlc8VhjuAZ8WM9dR1h4K93K+LufkPSCpVANGdIlJ0FJ1gNZUoViR3aG4zebOQNJzpEGsIUA X-Received: by 10.68.65.75 with SMTP id v11mr84841pbs.91.1430327820795; Wed, 29 Apr 2015 10:17:00 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id ol3sm17067460pbb.70.2015.04.29.10.16.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 29 Apr 2015 10:17:00 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH v2 09/11] coresight-etm4x: Controls pertaining to the selection of resources Date: Wed, 29 Apr 2015 11:16:33 -0600 Message-Id: <1430327795-10710-10-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430327795-10710-1-git-send-email-mathieu.poirier@linaro.org> References: <1430327795-10710-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150429_181724_692402_E47DC0BE X-CRM114-Status: GOOD ( 13.11 ) X-Spam-Score: -2.8 (--) Cc: mathieu.poirier@linaro.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org, kaixu.xia@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pratik Patel Adding sysfs entries to control the selection of the resources the trace unit will use as triggers to perform a trace run. Signed-off-by: Pratik Patel Signed-off-by: Mathieu Poirier --- .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 12 ++++ drivers/hwtracing/coresight/coresight-etm4x.c | 75 ++++++++++++++++++++++ 2 files changed, 87 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index b4581c9426d3..b5c0456290ab 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -242,3 +242,15 @@ Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier Description: (RW) Controls the operation of the selected counter. + +What: /sys/bus/coresight/devices/.etm/res_idx +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Select which resource selection unit to work with. + +What: /sys/bus/coresight/devices/.etm/res_ctrl +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Controls the selection of the resources in the trace unit. diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index cd6a1d51ad66..a9fda8ad8c2e 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -1707,6 +1707,79 @@ static ssize_t cntr_ctrl_store(struct device *dev, } static DEVICE_ATTR_RW(cntr_ctrl); +static ssize_t res_idx_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->res_idx; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t res_idx_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + /* Resource selector pair 0 is always implemented and reserved */ + if ((val == 0) || (val >= drvdata->nr_resource)) + return -EINVAL; + + /* + * Use spinlock to ensure index doesn't change while it gets + * dereferenced multiple times within a spinlock block elsewhere. + */ + spin_lock(&drvdata->spinlock); + drvdata->res_idx = val; + spin_unlock(&drvdata->spinlock); + return size; +} +static DEVICE_ATTR_RW(res_idx); + +static ssize_t res_ctrl_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + u8 idx; + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + spin_lock(&drvdata->spinlock); + idx = drvdata->res_idx; + val = drvdata->res_ctrl[idx]; + spin_unlock(&drvdata->spinlock); + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t res_ctrl_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + u8 idx; + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + + spin_lock(&drvdata->spinlock); + idx = drvdata->res_idx; + /* For odd idx pair inversal bit is RES0 */ + if (idx % 2 != 0) + /* PAIRINV, bit[21] */ + val &= ~BIT(21); + drvdata->res_ctrl[idx] = val; + spin_unlock(&drvdata->spinlock); + return size; +} +static DEVICE_ATTR_RW(res_ctrl); + static ssize_t status_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1887,6 +1960,8 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_cntrldvr.attr, &dev_attr_cntr_val.attr, &dev_attr_cntr_ctrl.attr, + &dev_attr_res_idx.attr, + &dev_attr_res_ctrl.attr, &dev_attr_status.attr, &dev_attr_mgmt.attr, &dev_attr_trcidr.attr,