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client-ip=192.88.158.2; helo=az84smr01.freescale.net; Received: from az84smr01.freescale.net (192.88.158.2) by BL2FFO11FD011.mail.protection.outlook.com (10.173.161.17) with Microsoft SMTP Server (TLS) id 15.1.160.8 via Frontend Transport; Thu, 30 Apr 2015 14:45:38 +0000 Received: from [az84smr01.freescale.net (B38339-11.am.freescale.net [10.81.92.140]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t3UEieiS026417; Thu, 30 Apr 2015 07:45:35 -0700 From: Shenwei Wang To: Subject: [PATCH 01/18] ARM: imx: Add a parameter to mxc_timer_init Date: Thu, 30 Apr 2015 09:44:16 -0500 Message-ID: <1430405073-13106-2-git-send-email-shenwei.wang@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430405073-13106-1-git-send-email-shenwei.wang@freescale.com> References: <1430405073-13106-1-git-send-email-shenwei.wang@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(47776003)(85426001)(19580395003)(106466001)(36756003)(62966003)(105606002)(77096005)(87936001)(2950100001)(5001960100002)(104016003)(6806004)(76176999)(77156002)(2351001)(50226001)(48376002)(92566002)(86362001)(50466002)(229853001)(33646002)(50986999)(46102003)(19580405001)(110136002); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR03MB463; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM2PR03MB463; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5005006)(3002001); SRVR:DM2PR03MB463; BCL:0; PCL:0; RULEID:; SRVR:DM2PR03MB463; X-Forefront-PRVS: 056297E276 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Apr 2015 14:45:38.0278 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR03MB463 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150430_074606_750888_9B26AA38 X-CRM114-Status: GOOD ( 11.03 ) X-Spam-Score: -0.2 (/) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A parameter of integer type is added to the function mxc_timer_init, so that a user could have a way to tell the timer driver the version of the timer IP block. Signed-off-by: Shenwei Wang --- arch/arm/mach-imx/time.c | 2 +- drivers/clk/imx/clk-imx1.c | 3 ++- drivers/clk/imx/clk-imx21.c | 3 ++- drivers/clk/imx/clk-imx27.c | 3 ++- drivers/clk/imx/clk-imx31.c | 3 ++- drivers/clk/imx/clk-imx35.c | 5 +++-- drivers/clk/imx/clk.h | 2 +- 7 files changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index b1698e1..eef6b66 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -346,7 +346,7 @@ static void __init _mxc_timer_init(int irq, setup_irq(irq, &mxc_timer_irq); } -void __init mxc_timer_init(unsigned long pbase, int irq) +void __init mxc_timer_init(unsigned long pbase, int irq, int ver) { struct clk *clk_per = clk_get_sys("imx-gpt.0", "per"); struct clk *clk_ipg = clk_get_sys("imx-gpt.0", "ipg"); diff --git a/drivers/clk/imx/clk-imx1.c b/drivers/clk/imx/clk-imx1.c index c9812db..49534d8 100644 --- a/drivers/clk/imx/clk-imx1.c +++ b/drivers/clk/imx/clk-imx1.c @@ -102,7 +102,8 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-fb.0"); clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ahb", "imx1-fb.0"); - mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT); + /*Timer version in MX1 is V0*/ + mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT, 0); return 0; } diff --git a/drivers/clk/imx/clk-imx21.c b/drivers/clk/imx/clk-imx21.c index 0ca842c..08aa048 100644 --- a/drivers/clk/imx/clk-imx21.c +++ b/drivers/clk/imx/clk-imx21.c @@ -156,7 +156,8 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_register_clkdev(clk[IMX21_CLK_I2C_GATE], NULL, "imx21-i2c.0"); clk_register_clkdev(clk[IMX21_CLK_OWIRE_GATE], NULL, "mxc_w1.0"); - mxc_timer_init(MX21_GPT1_BASE_ADDR, MX21_INT_GPT1); + /*Timer version in MX21 is v1*/ + mxc_timer_init(MX21_GPT1_BASE_ADDR, MX21_INT_GPT1, 1); return 0; } diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c index df2dfc0..f00a7c0 100644 --- a/drivers/clk/imx/clk-imx27.c +++ b/drivers/clk/imx/clk-imx27.c @@ -233,7 +233,8 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[IMX27_CLK_EMMA_AHB_GATE], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[IMX27_CLK_EMMA_IPG_GATE], "ipg", "m2m-emmaprp.0"); - mxc_timer_init(MX27_GPT1_BASE_ADDR, MX27_INT_GPT1); + /*Timer version in MX27 is v1*/ + mxc_timer_init(MX27_GPT1_BASE_ADDR, MX27_INT_GPT1, 1); return 0; } diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index a55290c..7c4a025 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -198,7 +198,8 @@ int __init mx31_clocks_init(unsigned long fref) mx31_revision(); clk_disable_unprepare(clk[iim_gate]); - mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT); + /*Timer version in MX31 is v2*/ + mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, 2); return 0; } diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c index 133fda1..a796c1e 100644 --- a/drivers/clk/imx/clk-imx35.c +++ b/drivers/clk/imx/clk-imx35.c @@ -145,7 +145,7 @@ int __init mx35_clocks_init(void) clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6); clk[spdif_sel] = imx_clk_mux("spdif_sel", base + MX35_CCM_PDR3, 22, 1, std_sel, ARRAY_SIZE(std_sel)); - clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /* divide by 1 not allowed */ + clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /* divide by 1 not allowed */ clk[spdif_div_post] = imx_clk_divider("spdif_div_post", "spdif_div_pre", base + MX35_CCM_PDR3, 23, 6); clk[ssi_sel] = imx_clk_mux("ssi_sel", base + MX35_CCM_PDR2, 6, 1, std_sel, ARRAY_SIZE(std_sel)); @@ -296,7 +296,8 @@ int __init mx35_clocks_init(void) #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); #else - mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT); + /*Timer version in MX35 is v2*/ + mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT, 2); #endif return 0; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 6bae537..06da84a 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -11,7 +11,7 @@ extern spinlock_t imx_ccm_lock; * mxc_timer_init() to initialize timer for non-DT boot. It can be removed * when these legacy non-DT support is converted or dropped. */ -void mxc_timer_init(unsigned long pbase, int irq); +void mxc_timer_init(unsigned long pbase, int irq, int); void imx_check_clocks(struct clk *clks[], unsigned int count);