From patchwork Thu Apr 30 16:20:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Coquelin X-Patchwork-Id: 6305801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 618ECBEEE1 for ; Thu, 30 Apr 2015 16:28:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5B0D7201EF for ; Thu, 30 Apr 2015 16:28:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5A4F2201E4 for ; Thu, 30 Apr 2015 16:28:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnrH8-0000n9-1Q; Thu, 30 Apr 2015 16:25:22 +0000 Received: from mail-wi0-x22a.google.com ([2a00:1450:400c:c05::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YnrDS-0007Er-5p for linux-arm-kernel@lists.infradead.org; Thu, 30 Apr 2015 16:21:35 +0000 Received: by widdi4 with SMTP id di4so24159692wid.0 for ; Thu, 30 Apr 2015 09:21:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2bEvd4U7pfc8GgYad0lkOFweK+W6Ixsd1h2orj+2n1k=; b=GqhM3ywkBZJC7Pa9ADLFWpVrKlj6t9PPomLfnoX2e0tzRUSrOW9CKpN86+Lb09RZ1q 18iz8hjDk9gV2MgoPtA9UgApqC1DZiJ5hkkTnLvUx5aWypWzyizQC5ILT5X89JOzktJq QSdOZtK5rXZbvo8HKAHZ84DG6qna8BhXF7o3zfcBNat/KZC3S7OWb6jpSuTYBvfOZbKZ j0Zg9CCFJX63vtS3Q0JuD68voSMMi/iM8a3wgwbTqOtQMzsKxpkkxK4dezeOOAO0cs/S SvTygP0V4jThECbYyZ14VPTMKe2K1UNCPEfmLQKvZaAyfcD7alx7CWrzE2klJhbHC3s/ cfrQ== X-Received: by 10.180.223.100 with SMTP id qt4mr6883592wic.1.1430410872356; Thu, 30 Apr 2015 09:21:12 -0700 (PDT) Received: from lmecul0520.st.com. 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[92.90.26.60]) by mx.google.com with ESMTPSA id ln8sm3971931wjc.18.2015.04.30.09.21.08 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 30 Apr 2015 09:21:11 -0700 (PDT) From: Maxime Coquelin To: u.kleine-koenig@pengutronix.de, afaerber@suse.de, geert@linux-m68k.org, Rob Herring , Philipp Zabel , Linus Walleij , Arnd Bergmann , stefan@agner.ch, pmeerw@pmeerw.net, pebolle@tiscali.nl, peter@hurleysoftware.com, andy.shevchenko@gmail.com, cw00.choi@samsung.com, Russell King , Daniel Lezcano , joe@perches.com, Vladimir Zapolskiy Subject: [PATCH v7 06/15] drivers: reset: Add STM32 reset driver Date: Thu, 30 Apr 2015 18:20:35 +0200 Message-Id: <1430410844-16062-7-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150430_092134_583500_F5DF83CA X-CRM114-Status: GOOD ( 16.40 ) X-Spam-Score: -0.6 (/) Cc: Mark Rutland , linux-doc@vger.kernel.org, Will Deacon , Nikolay Borisov , linux-api@vger.kernel.org, Jiri Slaby , linux-arch@vger.kernel.org, Daniel Thompson , Jonathan Corbet , Mauro Carvalho Chehab , Kamil Lulko , Antti Palosaari , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, Kees Cook , Pawel Moll , Ian Campbell , Rusty Russell , linux-gpio@vger.kernel.org, Thomas Gleixner , Nicolae Rosia , linux-arm-kernel@lists.infradead.org, Michal Marek , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, Kumar Gala , Tejun Heo , Andrew Morton , "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The STM32 MCUs family IPs can be reset by accessing some registers from the RCC block. The list of available reset lines is documented in the DT bindings. Tested-by: Chanwoo Choi Acked-by: Philipp Zabel Signed-off-by: Maxime Coquelin --- drivers/reset/Makefile | 1 + drivers/reset/reset-stm32.c | 124 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 125 insertions(+) create mode 100644 drivers/reset/reset-stm32.c diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 157d421..aed12d1 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_RESET_CONTROLLER) += core.o obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o +obj-$(CONFIG_ARCH_STM32) += reset-stm32.o obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o obj-$(CONFIG_ARCH_STI) += sti/ diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c new file mode 100644 index 0000000..2c41858 --- /dev/null +++ b/drivers/reset/reset-stm32.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) Maxime Coquelin 2015 + * Author: Maxime Coquelin + * License terms: GNU General Public License (GPL), version 2 + * + * Heavily based on sunxi driver from Maxime Ripard. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct stm32_reset_data { + spinlock_t lock; + void __iomem *membase; + struct reset_controller_dev rcdev; +}; + +static int stm32_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct stm32_reset_data *data = container_of(rcdev, + struct stm32_reset_data, + rcdev); + int bank = id / BITS_PER_LONG; + int offset = id % BITS_PER_LONG; + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&data->lock, flags); + + reg = readl_relaxed(data->membase + (bank * 4)); + writel_relaxed(reg | BIT(offset), data->membase + (bank * 4)); + + spin_unlock_irqrestore(&data->lock, flags); + + return 0; +} + +static int stm32_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct stm32_reset_data *data = container_of(rcdev, + struct stm32_reset_data, + rcdev); + int bank = id / BITS_PER_LONG; + int offset = id % BITS_PER_LONG; + unsigned long flags; + u32 reg; + + spin_lock_irqsave(&data->lock, flags); + + reg = readl_relaxed(data->membase + (bank * 4)); + writel_relaxed(reg & ~BIT(offset), data->membase + (bank * 4)); + + spin_unlock_irqrestore(&data->lock, flags); + + return 0; +} + +static struct reset_control_ops stm32_reset_ops = { + .assert = stm32_reset_assert, + .deassert = stm32_reset_deassert, +}; + +static const struct of_device_id stm32_reset_dt_ids[] = { + { .compatible = "st,stm32-rcc", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, sstm32_reset_dt_ids); + +static int stm32_reset_probe(struct platform_device *pdev) +{ + struct stm32_reset_data *data; + struct resource *res; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->membase = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->membase)) + return PTR_ERR(data->membase); + + spin_lock_init(&data->lock); + + data->rcdev.owner = THIS_MODULE; + data->rcdev.nr_resets = resource_size(res) * 8; + data->rcdev.ops = &stm32_reset_ops; + data->rcdev.of_node = pdev->dev.of_node; + + return reset_controller_register(&data->rcdev); +} + +static int stm32_reset_remove(struct platform_device *pdev) +{ + struct stm32_reset_data *data = platform_get_drvdata(pdev); + + reset_controller_unregister(&data->rcdev); + + return 0; +} + +static struct platform_driver stm32_reset_driver = { + .probe = stm32_reset_probe, + .remove = stm32_reset_remove, + .driver = { + .name = "stm32-rcc-reset", + .of_match_table = stm32_reset_dt_ids, + }, +}; +module_platform_driver(stm32_reset_driver); + +MODULE_AUTHOR("Maxime Coquelin "); +MODULE_DESCRIPTION("STM32 MCUs Reset Controller Driver"); +MODULE_LICENSE("GPL");