From patchwork Fri May 1 19:27:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gerlach X-Patchwork-Id: 6312501 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3AE039F32B for ; Fri, 1 May 2015 19:30:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 28DF6200CC for ; Fri, 1 May 2015 19:30:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 174A620121 for ; Fri, 1 May 2015 19:30:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YoGb6-0005FK-Ic; Fri, 01 May 2015 19:27:40 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YoGb1-0005DV-Vs for linux-arm-kernel@lists.infradead.org; Fri, 01 May 2015 19:27:37 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t41JRCEQ026154; Fri, 1 May 2015 14:27:12 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t41JRB61027447; Fri, 1 May 2015 14:27:11 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Fri, 1 May 2015 14:27:10 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t41JRAqZ007674; Fri, 1 May 2015 14:27:10 -0500 Received: from localhost (dave-ubuntu.am.dhcp.ti.com [128.247.9.208]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id t41JRA905701; Fri, 1 May 2015 14:27:10 -0500 (CDT) From: Dave Gerlach To: , Subject: [PATCH] ARM: OMAP2+: PRM: Fix am437x module reset Date: Fri, 1 May 2015 14:27:02 -0500 Message-ID: <1430508422-64913-1-git-send-email-d-gerlach@ti.com> X-Mailer: git-send-email 2.3.6 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150501_122736_212053_7FEE4092 X-CRM114-Status: GOOD ( 13.61 ) X-Spam-Score: -5.0 (-----) Cc: Tony Lindgren , Tero Kristo , Paul Walmsley , Dave Gerlach X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When moving to using the OMAP4+ PRM driver on am437x, we switched to using all omap4 ops for module reset management. However, reset register layout on am437x is more similar to am335x than omap4 because of the the need for an st_shift for the *_RST bits in certain *_RSTST registers, like WKUP_PROC_LRST in the PRCM_RM_WKUP_RSTST. Without this we cannot bring the Wakeup M3 IP out of reset. Because of this, we must use the am33xx prm ops for the hardreset functionality while continuing to use all other omap4 ops. To accomplish this we split out the common portion of omap44xx_prm_init and add an am437x_prm_init to register the prm_ll_data struct specific to am437x. Signed-off-by: Dave Gerlach Signed-off-by: Suman Anna --- arch/arm/mach-omap2/omap_hwmod.c | 6 +++--- arch/arm/mach-omap2/prm33xx.c | 14 +++++++------- arch/arm/mach-omap2/prm33xx.h | 7 +++++++ arch/arm/mach-omap2/prm44xx.c | 32 +++++++++++++++++++++++++++++++- arch/arm/mach-omap2/prm44xx_54xx.h | 1 + arch/arm/mach-omap2/prm_common.c | 2 +- 6 files changed, 50 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 982380b..4b13882 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3924,9 +3924,9 @@ void __init omap_hwmod_init(void) soc_ops.enable_module = _omap4_enable_module; soc_ops.disable_module = _omap4_disable_module; soc_ops.wait_target_ready = _omap4_wait_target_ready; - soc_ops.assert_hardreset = _omap4_assert_hardreset; - soc_ops.deassert_hardreset = _omap4_deassert_hardreset; - soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; + soc_ops.assert_hardreset = _am33xx_assert_hardreset; + soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; + soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted; soc_ops.init_clkdm = _init_clkdm; } else if (cpu_is_ti816x() || soc_is_am33xx()) { soc_ops.enable_module = _omap4_enable_module; diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index dcb5001..0a43bfe 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -64,8 +64,8 @@ static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) * 0 if the (sub)module hardreset line is not currently asserted, or * -EINVAL upon parameter error. */ -static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, - u16 rstctrl_offs) +int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) { u32 v; @@ -90,8 +90,8 @@ static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, * place the submodule into reset. Returns 0 upon success or -EINVAL * upon an argument error. */ -static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, - u16 rstctrl_offs) +int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs) { u32 mask = 1 << shift; @@ -119,9 +119,9 @@ static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, * -EINVAL upon an argument error, -EEXIST if the submodule was already out * of reset, or -EBUSY if the submodule did not exit reset promptly. */ -static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, - s16 inst, u16 rstctrl_offs, - u16 rstst_offs) +int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, + s16 inst, u16 rstctrl_offs, + u16 rstst_offs) { int c; u32 mask = 1 << st_shift; diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 2bc4ec5..2754e9f 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -120,5 +120,12 @@ #ifndef __ASSEMBLER__ int am33xx_prm_init(const struct omap_prcm_init_data *data); +int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, + u16 rstctrl_offs); +int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, + s16 inst, u16 rstctrl_offs, + u16 rstst_offs); #endif /* ASSEMBLER */ #endif diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 4541700..3fc6971 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -24,6 +24,7 @@ #include "iomap.h" #include "common.h" #include "vp.h" +#include "prm33xx.h" #include "prm44xx.h" #include "prm-regbits-44xx.h" #include "prcm44xx.h" @@ -705,7 +706,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = { static const struct omap_prcm_init_data *prm_init_data; -int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) +static void omap44xx_prm_init_common(const struct omap_prcm_init_data *data) { omap_prm_base_init(); @@ -718,7 +719,11 @@ int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) prm_features |= PRM_HAS_VOLTAGE; omap4_prminst_set_prm_dev_inst(data->device_inst_offset); +} +int __init omap44xx_prm_init(const struct omap_prcm_init_data *data) +{ + omap44xx_prm_init_common(data); return prm_register(&omap44xx_prm_ll_data); } @@ -762,3 +767,28 @@ static void __exit omap44xx_prm_exit(void) prm_unregister(&omap44xx_prm_ll_data); } __exitcall(omap44xx_prm_exit); + +#ifdef CONFIG_SOC_AM43XX +static struct prm_ll_data am43xx_prm_ll_data = { + .read_reset_sources = &omap44xx_prm_read_reset_sources, + .was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old, + .clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old, + .late_init = &omap44xx_prm_late_init, + .assert_hardreset = am33xx_prm_assert_hardreset, + .deassert_hardreset = am33xx_prm_deassert_hardreset, + .is_hardreset_asserted = am33xx_prm_is_hardreset_asserted, + .reset_system = omap4_prminst_global_warm_sw_reset, +}; + +int __init am43xx_prm_init(const struct omap_prcm_init_data *data) +{ + omap44xx_prm_init_common(data); + return prm_register(&am43xx_prm_ll_data); +} + +static void __exit am43xx_prm_exit(void) +{ + prm_unregister(&am43xx_prm_ll_data); +} +__exitcall(am43xx_prm_exit); +#endif /* CONFIG_SOC_AM43XX */ diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index 3f139eb..3e90d6a 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -36,6 +36,7 @@ extern u32 omap4_prm_vcvp_read(u8 offset); extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); +int __init am43xx_prm_init(const struct omap_prcm_init_data *data); int __init omap44xx_prm_init(const struct omap_prcm_init_data *data); #endif diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 7add799..730fd24 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -694,7 +694,7 @@ static struct omap_prcm_init_data dra7_prm_data __initdata = { #ifdef CONFIG_SOC_AM43XX static struct omap_prcm_init_data am4_prm_data __initdata = { .index = TI_CLKM_PRM, - .init = omap44xx_prm_init, + .init = am43xx_prm_init, .device_inst_offset = AM43XX_PRM_DEVICE_INST, }; #endif