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[84.7.143.213]) by mx.google.com with ESMTPSA id z12sm12098020wjq.12.2015.05.09.00.54.25 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 09 May 2015 00:54:27 -0700 (PDT) From: Maxime Coquelin To: u.kleine-koenig@pengutronix.de, afaerber@suse.de, geert@linux-m68k.org, Rob Herring , Philipp Zabel , Linus Walleij , Arnd Bergmann , stefan@agner.ch, pmeerw@pmeerw.net, pebolle@tiscali.nl, peter@hurleysoftware.com, andy.shevchenko@gmail.com, cw00.choi@samsung.com, Russell King , Daniel Lezcano , joe@perches.com, Vladimir Zapolskiy , lee.jones@linaro.org, Daniel Thompson Subject: [PATCH v8 08/16] dt-bindings: Document the STM32 timer bindings Date: Sat, 9 May 2015 09:53:50 +0200 Message-Id: <1431158038-3813-9-git-send-email-mcoquelin.stm32@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150509_005451_382043_F07E2174 X-CRM114-Status: GOOD ( 10.56 ) X-Spam-Score: -0.6 (/) Cc: Mark Rutland , linux-doc@vger.kernel.org, Will Deacon , Nikolay Borisov , linux-api@vger.kernel.org, Jiri Slaby , linux-arch@vger.kernel.org, Jonathan Corbet , Mauro Carvalho Chehab , Kamil Lulko , Antti Palosaari , linux-serial@vger.kernel.org, devicetree@vger.kernel.org, Kees Cook , Pawel Moll , Ian Campbell , Rusty Russell , linux-gpio@vger.kernel.org, Thomas Gleixner , Nicolae Rosia , linux-arm-kernel@lists.infradead.org, Michal Marek , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, mcoquelin.stm32@gmail.com, Kumar Gala , Tejun Heo , Andrew Morton , "David S. Miller" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation of device tree bindings for the STM32 timer. Tested-by: Chanwoo Choi Acked-by: Rob Herring Signed-off-by: Maxime Coquelin --- .../devicetree/bindings/timer/st,stm32-timer.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.txt diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt new file mode 100644 index 0000000..8ef28e7 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt @@ -0,0 +1,22 @@ +. STMicroelectronics STM32 timer + +The STM32 MCUs family has several general-purpose 16 and 32 bits timers. + +Required properties: +- compatible : Should be "st,stm32-timer" +- reg : Address and length of the register set +- clocks : Reference on the timer input clock +- interrupts : Reference to the timer interrupt + +Optional properties: +- resets: Reference to a reset controller asserting the timer + +Example: + +timer5: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + resets = <&rrc 259>; + clocks = <&clk_pmtr1>; +};