From patchwork Wed May 13 14:57:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 6397701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8640DBEEE1 for ; Wed, 13 May 2015 15:03:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C0CAF20411 for ; Wed, 13 May 2015 15:03:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8FDF203B1 for ; Wed, 13 May 2015 15:03:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsY8J-0000XG-Vb; Wed, 13 May 2015 14:59:39 +0000 Received: from mail-wi0-x229.google.com ([2a00:1450:400c:c05::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsY6y-0008Bi-PJ for linux-arm-kernel@lists.infradead.org; Wed, 13 May 2015 14:58:19 +0000 Received: by wicnf17 with SMTP id nf17so59462099wic.1 for ; Wed, 13 May 2015 07:57:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BUarUplawWDr1Q2HOt+w4muBUC/cuJ/RHgLafsISTaQ=; b=dR4zdfKUp8FKjmvUwwJrYFaoAe9xCMJnRLTIWkS7JKfQbe/gcyfEooAFATzrZYRyLB qPbqJm5h8f9l37cSLNFflWcjrUeoF8vVZwEnyILnRB9fkoA4lEY5OeFJpUMWTtzJopAz ZfsXY3qzMkDb8YEeihxXcK9fBBXpkRQv4CpSPLd/AdZzZ9lluX1SY54raRGECFROo52Q fFLErX8cSN7y10/MYvUaWV1NlwXcHNhq2p1jtqkVBpdEVVkq3jgi6ddQA4qhfUS9qF2T Gm99Wt/PFkADUbt+ZtNPBWOC912c7xjxEqzdxiDFllNKPqihwvxJEvNGzJykLFHaExEr F6Bg== X-Received: by 10.194.89.130 with SMTP id bo2mr39933296wjb.17.1431529073353; Wed, 13 May 2015 07:57:53 -0700 (PDT) Received: from localhost (port-92079.pppoe.wtnet.de. [84.46.72.40]) by mx.google.com with ESMTPSA id ha4sm8505076wib.0.2015.05.13.07.57.52 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 May 2015 07:57:52 -0700 (PDT) From: Thierry Reding To: Thierry Reding Subject: [PATCH 4/6] arm64: tegra: Add NVIDIA P2530 compute module support Date: Wed, 13 May 2015 16:57:43 +0200 Message-Id: <1431529065-20128-4-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1431529065-20128-1-git-send-email-thierry.reding@gmail.com> References: <1431529065-20128-1-git-send-email-thierry.reding@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150513_075817_168991_21FDFE3D X-CRM114-Status: GOOD ( 10.49 ) X-Spam-Score: -0.8 (/) Cc: devicetree@vger.kernel.org, Alexandre Courbot , Catalin Marinas , Stephen Warren , Will Deacon , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The NVIDIA P2530 is a compute module used in several reference designs. It features a Tegra210 SoC, 4 GiB of LPDDR4 RAM, 16 GiB eMMC and various other essentials. It is typically connected to some base board that provides the connectors needed to hook it up to the outside world. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-p2530-e03.dtsi | 285 +++++++++++++++++++++ 1 file changed, 285 insertions(+) create mode 100644 arch/arm64/boot/dts/nvidia/tegra210-p2530-e03.dtsi diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530-e03.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530-e03.dtsi new file mode 100644 index 000000000000..8221f6588397 --- /dev/null +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530-e03.dtsi @@ -0,0 +1,285 @@ +#include "tegra210.dtsi" + +/ { + model = "NVIDIA Tegra210 P2530 main board"; + compatible = "nvidia,p2530-e03", "nvidia,tegra210"; + + aliases { + rtc0 = "/i2c@0,7000d000/pmic@3c"; + rtc1 = "/rtc@0,7000e000"; + serial0 = &uarta; + }; + + memory { + reg = <0x0 0x80000000 0x0 0xc0000000>; + }; + + /* debug port */ + serial@0,70006000 { + status = "okay"; + }; + + i2c@0,7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: pmic@3c { + compatible = "maxim,max77620"; + reg = <0x3c>; + interrupts = ; + + #interrupt-cells = <2>; + interrupt-controller; + + #gpio-cells = <2>; + gpio-controller; + + maxim,enable-clock32k-out; + + maxim,system-pmic-power-off; + + maxim,hot-die-threshold-temp = <110000>; + #thermal-sensor-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&max77620_default>; + + gpio-init-names = "default"; + gpio-init-0 = <&max77620_gpio_default>; + + max77620_default: pinmux@0 { + pin_gpio0 { + pins = "gpio0"; + function = "gpio"; + }; + + pin_gpio1 { + pins = "gpio1"; + function = "fps-out"; + drive-push-pull = <1>; + maxim,fps-source = <0>; + maxim,fps-power-up-period = <7>; + maxim,fps-power-down-period = <0>; + }; + + pin_gpio2 { + pins = "gpio2", "gpio3"; + function = "fps-out"; + drive-open-drain = <1>; + maxim,fps-source = <0>; + }; + + pin_gpio4 { + pins = "gpio4"; + function = "32k-out1"; + }; + + pin_gpio5_6_7 { + pins = "gpio5", "gpio6", "gpio7"; + function = "gpio"; + drive-push-pull = <1>; + }; + }; + + max77620_gpio_default: gpio_default { + gpio-output-high = <2>; + }; + + watchdog { + maxim,wdt-timeout = <16>; + maxim,wdt-clear-time = <13>; + status = "disabled"; + dt-override-status-odm-data = <0x00020000 0x00020000>; + }; + + fps { + #address-cells = <1>; + #size-cells = <0>; + fps@0 { + reg = <0>; + maxim,fps-time-period = <2560>; + maxim,fps-enable-input = <0>; + }; + + fps@1 { + reg = <1>; + maxim,fps-time-period = <2560>; + maxim,fps-enable-input = <1>; + maxim,enable-sleep; + }; + + fps@2 { + reg = <2>; + maxim,fps-enable-input = <0>; + }; + }; + + backup-battery { + maxim,backup-battery-charging-current = <100>; + maxim,backup-battery-charging-voltage = <3000000>; + maxim,backup-battery-output-resister = <100>; + }; + + regulators { + in-ldo0-1-supply = <&max77620_sd2>; + in-ldo7-8-supply = <&max77620_sd2>; + + max77620_sd0: sd0 { + regulator-name = "VDD_SOC"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <1>; + regulator-init-mode = <2>; + }; + + max77620_sd1: sd1 { + regulator-name = "VDD_DDR_1V1_PMIC"; + regulator-always-on; + regulator-boot-on; + regulator-init-mode = <2>; + maxim,fps-source = <0>; + }; + + max77620_sd2: sd2 { + regulator-name = "VDD_PRE_REG_1V35"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + maxim,fps-source = <1>; + }; + + vdd_1v8: sd3 { + regulator-name = "VDD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <0>; + regulator-init-mode = <2>; + }; + + vdd_sys_1v2: ldo0 { + regulator-name = "AVDD_SYS_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <3>; + }; + + vdd_pex_1v05: ldo1 { + regulator-name = "VDD_PEX_1V05"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + maxim,fps-source = <3>; + }; + + vddio_sdmmc: ldo2 { + regulator-name = "VDDIO_SDMMC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + maxim,fps-source = <3>; + }; + + max77620_ldo3: ldo3 { + regulator-name = "VDD_CAM_HV"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + maxim,fps-source = <3>; + }; + + max77620_ldo4: ldo4 { + regulator-name = "VDD_RTC"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <0>; + }; + + max77620_ldo5: ldo5 { + regulator-name = "VDD_TS_HV"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + maxim,fps-source = <3>; + }; + + max77620_ldo6: ldo6 { + regulator-name = "VDD_TS_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <0>; + maxim,fps-power-up-period = <7>; + maxim,fps-power-down-period = <0>; + }; + + avdd_1v05_pll: ldo7 { + regulator-name = "AVDD_1V05_PLL"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-always-on; + regulator-boot-on; + maxim,fps-source = <1>; + }; + + avdd_1v05: ldo8 { + regulator-name = "AVDD_SATA_HDMI_DP_1V05"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + maxim,fps-source = <3>; + }; + }; + }; + }; + + pmc@0,7000e400 { + nvidia,invert-interrupt; + }; + + /* eMMC */ + sdhci@0,700b0600 { + status = "okay"; + bus-width = <8>; + non-removable; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + clk32k_in: clock@0 { + compatible = "fixed-clock"; + reg = <0>; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + + cpus { + cpu@0 { + enable-method = "psci"; + }; + + cpu@1 { + enable-method = "psci"; + }; + + cpu@2 { + enable-method = "psci"; + }; + + cpu@3 { + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + status = "disabled"; + method = "smc"; + }; +};