From patchwork Wed May 13 16:34:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6398881 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 266B89F374 for ; Wed, 13 May 2015 16:52:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 088052044C for ; Wed, 13 May 2015 16:52:48 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E6D922043C for ; Wed, 13 May 2015 16:52:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsZqE-0008Sc-G9; Wed, 13 May 2015 16:49:06 +0000 Received: from mail-pd0-f170.google.com ([209.85.192.170]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsZdD-0005Ao-Dy for linux-arm-kernel@lists.infradead.org; Wed, 13 May 2015 16:35:41 +0000 Received: by pdbqd1 with SMTP id qd1so56599160pdb.2 for ; Wed, 13 May 2015 09:35:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1TvpQOZU6xBOT+HlpzdcA2RAzsJ8yqGzWXETRdoeGvY=; b=U0zKhU8t9wesEx9N+H2Inko3wZo0fru8dVrNnGMqNyk5f6gLzok+OfoZNYriwZTaE+ hBKUQm4/p431h/TSmleBFsrsqwgW13t/3mVwKPAVluufiOBDipo5kAqGUcymAZyaCEVI WHf6EUTyif1TpBTg5hSywBW4YOk3/dvpXLrC66ZuBZjvRqdbFU61TIrIoMEvm/IoaFZC M4fZfQeaPBZWZukhlhcg0vB7aab/6+IUNx0iF+eHBicq5qm9ts4gIZV2dORT+OG+n6UA Vn123IiRHcv2ePnpP/c+Fn7iO1+f3LPyFmSJ0jOgkbLWdrEfpt6fItCQjSmp61y5OpAD FgQg== X-Gm-Message-State: ALoCoQmH+Lckmi762NTeHlVQvIX3dbozD5RJOpsS54asvNn2PPzgHen5onkpLhqMMyTiR/9SO+/r X-Received: by 10.66.192.74 with SMTP id he10mr38535370pac.145.1431534917708; Wed, 13 May 2015 09:35:17 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id ue9sm19388667pbc.78.2015.05.13.09.35.16 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 May 2015 09:35:16 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH v4 13/13] coresight-etm4x: Read only access to the tracer's ID registers Date: Wed, 13 May 2015 10:34:21 -0600 Message-Id: <1431534861-24986-14-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431534861-24986-1-git-send-email-mathieu.poirier@linaro.org> References: <1431534861-24986-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150513_093539_574211_5F8EA494 X-CRM114-Status: GOOD ( 11.49 ) X-Spam-Score: -0.7 (/) Cc: mathieu.poirier@linaro.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org, kaixu.xia@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ETM ID registers contain valuable information about the capabilities of the implementation and are very useful when configuring the device for various trace scenarios. Signed-off-by: Mathieu Poirier --- .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 90 ++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm4x.c | 37 +++++++++ 2 files changed, 127 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index bde788dfd3f7..2fe2e3dae487 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -358,3 +358,93 @@ KernelVersion: 4.01 Contact: Mathieu Poirier Description: (R) Print the content of the Peripheral ID3 Register (0xFEC). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr0 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the tracing capabilities of the trace unit (0x1E0). + The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr1 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the tracing capabilities of the trace unit (0x1E4). + The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr2 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the maximum size of the data value, data address, + VMID, context ID and instuction address in the trace unit + (0x1E8). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr3 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the value associated with various resources + available to the trace unit. See the Trace Macrocell + architecture specification for more details (0x1E8). + The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr4 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns how many resources the trace unit supports (0x1F0). + The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr5 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns how many resources the trace unit supports (0x1F4). + The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr8 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the maximum speculation depth of the instruction + trace stream. (0x180). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr9 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the number of P0 right-hand keys that the trace unit + can use (0x184). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr10 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the number of P1 right-hand keys that the trace unit + can use (0x188). The value is taken directly from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr11 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the number of special P1 right-hand keys that the + trace unit can use (0x18C). The value is taken directly from + the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr12 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the number of conditional P1 right-hand keys that + the trace unit can use (0x190). The value is taken directly + from the HW. + +What: /sys/bus/coresight/devices/.etm/trcidr/trcidr13 +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (R) Returns the number of special conditional P1 right-hand keys + that the trace unit can use (0x194). The value is taken + directly from the HW. diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 0568e4413411..f0b50af4fc30 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -2238,6 +2238,37 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = { NULL, }; +coresight_simple_func(trcidr0, TRCIDR0); +coresight_simple_func(trcidr1, TRCIDR1); +coresight_simple_func(trcidr2, TRCIDR2); +coresight_simple_func(trcidr3, TRCIDR3); +coresight_simple_func(trcidr4, TRCIDR4); +coresight_simple_func(trcidr5, TRCIDR5); +/* trcidr[6,7] are reserved */ +coresight_simple_func(trcidr8, TRCIDR8); +coresight_simple_func(trcidr9, TRCIDR9); +coresight_simple_func(trcidr10, TRCIDR10); +coresight_simple_func(trcidr11, TRCIDR11); +coresight_simple_func(trcidr12, TRCIDR12); +coresight_simple_func(trcidr13, TRCIDR13); + +static struct attribute *coresight_etmv4_trcidr_attrs[] = { + &dev_attr_trcidr0.attr, + &dev_attr_trcidr1.attr, + &dev_attr_trcidr2.attr, + &dev_attr_trcidr3.attr, + &dev_attr_trcidr4.attr, + &dev_attr_trcidr5.attr, + /* trcidr[6,7] are reserved */ + &dev_attr_trcidr8.attr, + &dev_attr_trcidr9.attr, + &dev_attr_trcidr10.attr, + &dev_attr_trcidr11.attr, + &dev_attr_trcidr12.attr, + &dev_attr_trcidr13.attr, + NULL, +}; + static const struct attribute_group coresight_etmv4_group = { .attrs = coresight_etmv4_attrs, }; @@ -2247,9 +2278,15 @@ static const struct attribute_group coresight_etmv4_mgmt_group = { .name = "mgmt", }; +static const struct attribute_group coresight_etmv4_trcidr_group = { + .attrs = coresight_etmv4_trcidr_attrs, + .name = "trcidr", +}; + static const struct attribute_group *coresight_etmv4_groups[] = { &coresight_etmv4_group, &coresight_etmv4_mgmt_group, + &coresight_etmv4_trcidr_group, NULL, };