From patchwork Wed May 13 16:34:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6398941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BD1279F374 for ; Wed, 13 May 2015 16:58:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9E4012034F for ; Wed, 13 May 2015 16:58:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91CB72026F for ; Wed, 13 May 2015 16:58:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsZvA-0004kp-IK; Wed, 13 May 2015 16:54:12 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsZcw-0005AS-AB for linux-arm-kernel@bombadil.infradead.org; Wed, 13 May 2015 16:35:22 +0000 Received: from mail-pa0-f51.google.com ([209.85.220.51]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YsZcq-0001FW-1L for linux-arm-kernel@lists.infradead.org; Wed, 13 May 2015 16:35:17 +0000 Received: by pacyx8 with SMTP id yx8so55670571pac.1 for ; Wed, 13 May 2015 09:34:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=s3nxbQYhy1FmMMIcNyR02VoyXzswNF9nLmxNNXEdY0U=; b=YTe/5l9NcysdSoRK4NDTyqK3aEeFenydRZowy0OoC1MYfVqhsnRnOCDXP1GKBaRlJj JlXz8WLu9KI1SJBVzRGwHQnJ+GT8ESPulcCS76IpaVPPf0H7AD1fAyg9m1rp94dLiuwn wQ9mrunIwP2ogm/hNZpzYMda+Ak6A3S5Fh5kz099QZZIRfA3dWaUOt9tox8nlh3tN0Fi V4TvjYqW+RAOmE/Y2wrgaL3zgDuQluVsIQSDpQkkgqymHy2ZdayNKhd/D0QYbcfJ0gqM paUWjMNd1sw9UoqI+siLNVNTQZE7Ondio4e2EfPjVPRuCx88psSH2Z23e7pZSwESOcVW aBUQ== X-Gm-Message-State: ALoCoQlDUowhnC++eG96K7rKdXRWa1KExbnbpLu+dKgIgmaW8PMdN6OnLXBElEWjMe/yPkchxa8y X-Received: by 10.66.100.138 with SMTP id ey10mr38492263pab.110.1431534892988; Wed, 13 May 2015 09:34:52 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id ue9sm19388667pbc.78.2015.05.13.09.34.51 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 13 May 2015 09:34:51 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH v4 04/13] coresight-etm4x: Controls pertaining to various configuration options Date: Wed, 13 May 2015 10:34:12 -0600 Message-Id: <1431534861-24986-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1431534861-24986-1-git-send-email-mathieu.poirier@linaro.org> References: <1431534861-24986-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150513_173516_211898_F7E18B61 X-CRM114-Status: GOOD ( 13.56 ) X-Spam-Score: -2.6 (--) Cc: mathieu.poirier@linaro.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org, kaixu.xia@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Pratik Patel Adding sysfs entries to configure: . global timestamp. . how often trace synchronisation occur. . the threashold value for cycle counting. . branch and broadcasting regions. Signed-off-by: Pratik Patel Signed-off-by: Mathieu Poirier --- .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 26 +++++ drivers/hwtracing/coresight/coresight-etm4x.c | 124 +++++++++++++++++++++ 2 files changed, 150 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x index 7917a180cfc6..7e5f9bf1d508 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x @@ -108,3 +108,29 @@ Date: April 2015 KernelVersion: 4.01 Contact: Mathieu Poirier Description: (RW) Controls the behavior of the events in bank 0 to 3. + +What: /sys/bus/coresight/devices/.etm/event_ts +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Controls the insertion of global timestamps in the trace + streams. + +What: /sys/bus/coresight/devices/.etm/syncfreq +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Controls how often trace synchronization requests occur. + +What: /sys/bus/coresight/devices/.etm/cyc_threshold +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Sets the threshold value for cycle counting. + +What: /sys/bus/coresight/devices/.etm/bb_ctrl +Date: April 2015 +KernelVersion: 4.01 +Contact: Mathieu Poirier +Description: (RW) Controls which regions in the memory map are enabled to + use branch broadcasting. diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index e9f58a5d2934..51fbda837026 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -812,6 +812,126 @@ static ssize_t event_instren_store(struct device *dev, } static DEVICE_ATTR_RW(event_instren); +static ssize_t event_ts_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->ts_ctrl; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t event_ts_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + if (!drvdata->ts_size) + return -EINVAL; + + drvdata->ts_ctrl = val & ETMv4_EVENT_MASK; + return size; +} +static DEVICE_ATTR_RW(event_ts); + +static ssize_t syncfreq_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->syncfreq; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t syncfreq_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + if (drvdata->syncpr == true) + return -EINVAL; + + drvdata->syncfreq = val & ETMv4_SYNC_MASK; + return size; +} +static DEVICE_ATTR_RW(syncfreq); + +static ssize_t cyc_threshold_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->ccctlr; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t cyc_threshold_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + if (val < drvdata->ccitmin) + return -EINVAL; + + drvdata->ccctlr = val & ETM_CYC_THRESHOLD_MASK; + return size; +} +static DEVICE_ATTR_RW(cyc_threshold); + +static ssize_t bb_ctrl_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + val = drvdata->bb_ctrl; + return scnprintf(buf, PAGE_SIZE, "%#lx\n", val); +} + +static ssize_t bb_ctrl_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t size) +{ + unsigned long val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (kstrtoul(buf, 16, &val)) + return -EINVAL; + if (drvdata->trcbb == false) + return -EINVAL; + if (!drvdata->nr_addr_cmp) + return -EINVAL; + /* + * Bit[7:0] selects which address range comparator is used for + * branch broadcast control. + */ + if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp) + return -EINVAL; + + drvdata->bb_ctrl = val; + return size; +} +static DEVICE_ATTR_RW(bb_ctrl); + static ssize_t cpu_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -839,6 +959,10 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_pe.attr, &dev_attr_event.attr, &dev_attr_event_instren.attr, + &dev_attr_event_ts.attr, + &dev_attr_syncfreq.attr, + &dev_attr_cyc_threshold.attr, + &dev_attr_bb_ctrl.attr, &dev_attr_cpu.attr, NULL, };