From patchwork Tue May 19 16:55:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6439591 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 92EFC9F318 for ; Tue, 19 May 2015 17:01:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A67CB2045E for ; Tue, 19 May 2015 17:01:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A0D152047C for ; Tue, 19 May 2015 17:01:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yukr0-0000Ce-D6; Tue, 19 May 2015 16:58:54 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YukoN-0007E0-1D for linux-arm-kernel@lists.infradead.org; Tue, 19 May 2015 16:56:14 +0000 Received: by pacwv17 with SMTP id wv17so32194945pac.2 for ; Tue, 19 May 2015 09:55:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bnsL0/N46STkzi2OZp6Ja52sf4PvGzmPdGjNN9p5M9k=; b=GDXYcs8IYpfM7rbr6/C08yXC28H5xJVKHM6dOVNSYTBST8ci9jYdjLrF5c2eX5BxlU 5wlWwRIktaoC05Ne3/UsjAjs98nNQQqQY8d/7Z3/WQ8ZqGbuLWlRkZaGKDt1GgciQScA 1sKhyiid/9rPkIQLteTUECR+V2C4lttnYQPW08mcsFCc3JrDLHFplg9FAlqzK2QVmh/z DVBM43IaGU6HFxiOqjhAeYtWNxNUN6YeXoZvR9ZO7QJC6XvHc6KxnbY7eoitsqaKFDYh xxhbLt0noLiq1xtBg0re/JI/jXX0T7frZDiFUrG7NWIJhjNPrM0tVNt5/D8lT66pcVd+ 71GQ== X-Gm-Message-State: ALoCoQnX8tQVUtmS/mEYszxgjtc6lbw3/HVK0CylooHGmwvZRI6GtwB/dqpQkSY954CBwfmSAS7M X-Received: by 10.68.201.138 with SMTP id ka10mr56499672pbc.6.1432054553712; Tue, 19 May 2015 09:55:53 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id rx6sm11817453pbc.54.2015.05.19.09.55.52 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 May 2015 09:55:53 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 10/16] coresight: tpiu: retrieve and handle atclk Date: Tue, 19 May 2015 10:55:15 -0600 Message-Id: <1432054521-24807-11-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> References: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150519_095611_155492_3D6287C3 X-CRM114-Status: GOOD ( 16.16 ) X-Spam-Score: -0.7 (/) Cc: mathieu.poirier@linaro.org, kaixu.xia@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, zhang.chunyan@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Linus Walleij As can be seen from the datasheet of the CoreSight Components, DDI0314H page A-19 the TPIU has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks in conjunction. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: Ulf Hansson Signed-off-by: Linus Walleij Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tpiu.c | 37 ++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 688ba937069e..7214efd10db5 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "coresight-priv.h" @@ -50,11 +51,13 @@ /** * @base: memory mapped base address for this component. * @dev: the device entity associated to this component. + * @atclk: optional clock for the core parts of the TPIU. * @csdev: component vitals needed by the framework. */ struct tpiu_drvdata { void __iomem *base; struct device *dev; + struct clk *atclk; struct coresight_device *csdev; }; @@ -111,6 +114,7 @@ static const struct coresight_ops tpiu_cs_ops = { static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) { + int ret; void __iomem *base; struct device *dev = &adev->dev; struct coresight_platform_data *pdata = NULL; @@ -131,6 +135,12 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) return -ENOMEM; drvdata->dev = &adev->dev; + drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ + if (!IS_ERR(drvdata->atclk)) { + ret = clk_prepare_enable(drvdata->atclk); + if (ret) + return ret; + } dev_set_drvdata(dev, drvdata); /* Validity for the resource is already checked by the AMBA core */ @@ -170,6 +180,32 @@ static int tpiu_remove(struct amba_device *adev) return 0; } +#ifdef CONFIG_PM +static int tpiu_runtime_suspend(struct device *dev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + + return 0; +} + +static int tpiu_runtime_resume(struct device *dev) +{ + struct tpiu_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); + + return 0; +} +#endif + +static const struct dev_pm_ops tpiu_dev_pm_ops = { + SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL) +}; + static struct amba_id tpiu_ids[] = { { .id = 0x0003b912, @@ -186,6 +222,7 @@ static struct amba_driver tpiu_driver = { .drv = { .name = "coresight-tpiu", .owner = THIS_MODULE, + .pm = &tpiu_dev_pm_ops, }, .probe = tpiu_probe, .remove = tpiu_remove,