From patchwork Tue May 19 16:55:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6439631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3E6E3C0432 for ; Tue, 19 May 2015 17:04:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 445E120454 for ; Tue, 19 May 2015 17:04:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3914E20395 for ; Tue, 19 May 2015 17:04:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yuktd-0003Xo-H3; Tue, 19 May 2015 17:01:37 +0000 Received: from mail-pd0-f179.google.com ([209.85.192.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YukoV-0007Ip-0l for linux-arm-kernel@lists.infradead.org; Tue, 19 May 2015 16:56:20 +0000 Received: by pdea3 with SMTP id a3so32977588pde.2 for ; Tue, 19 May 2015 09:55:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A+l4bJs+6VZYPXO4zhYhuURkGfGXNOPtx4eHW4e1i6c=; b=VbFUVdU6jHiYs+Riv96Lxk0i/nlvlWwj6aA6FCnS+AQulzxCJyKsose8s2SSGUfivu j0BjedXTC36Fi+UpCqoK8iEw4fPqVwuejXo9Ku7GfuGD5ZbTUIRnN7EujhHjmb0ydxIH hhQ64hYxdYmE7mMHCBGNCW2IXNP4dxzqD8GnI64egdJE12nZcLVk7OJiuYAc9616JpID s3Ih0F2Bl76/CqOUBWboQfP3B7QgE0HXqaE3KJC7yobnbh/t/eEsUgo4NmxwHY0lpVBQ CGCM9raYHg/mT2jA3KSHguIE6V3F3141w5Xa/p2z6qXy7Vq7xaUcS7VQPQ4E1B3sUIWi 7U/A== X-Gm-Message-State: ALoCoQkCO2dpah0HtBs3TwYIe4uCJf0bwHlrgmi2WtrXvREhg+dXO8mbsc6VOc/nYiZ/20zzB59f X-Received: by 10.66.141.77 with SMTP id rm13mr55898457pab.14.1432054557825; Tue, 19 May 2015 09:55:57 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id rx6sm11817453pbc.54.2015.05.19.09.55.56 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 May 2015 09:55:57 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 13/16] coresight: replicator: retrieve and handle atclk Date: Tue, 19 May 2015 10:55:18 -0600 Message-Id: <1432054521-24807-14-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> References: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150519_095619_107818_B84416FE X-CRM114-Status: GOOD ( 18.48 ) X-Spam-Score: -1.8 (-) Cc: mathieu.poirier@linaro.org, kaixu.xia@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, zhang.chunyan@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Linus Walleij As can be seen from the datasheet of the CoreSight Components, DDI0314 table A-4 the funnel has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. As the replicator is a platform device, the code is a bit different from the other CoreSight components and the bus core does not activate runtime PM by default, so we need a few extra calls. Reviewed-by: Ulf Hansson Signed-off-by: Linus Walleij Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-replicator.c | 71 ++++++++++++++++++++-- 1 file changed, 67 insertions(+), 4 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 75b9abd804e6..7974b7c3da6b 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -27,10 +28,12 @@ /** * struct replicator_drvdata - specifics associated to a replicator component * @dev: the device entity associated with this component + * @atclk: optional clock for the core parts of the replicator. * @csdev: component vitals needed by the framework */ struct replicator_drvdata { struct device *dev; + struct clk *atclk; struct coresight_device *csdev; }; @@ -39,6 +42,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + pm_runtime_get_sync(drvdata->dev); dev_info(drvdata->dev, "REPLICATOR enabled\n"); return 0; } @@ -48,6 +52,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + pm_runtime_put(drvdata->dev); dev_info(drvdata->dev, "REPLICATOR disabled\n"); } @@ -62,6 +67,7 @@ static const struct coresight_ops replicator_cs_ops = { static int replicator_probe(struct platform_device *pdev) { + int ret; struct device *dev = &pdev->dev; struct coresight_platform_data *pdata = NULL; struct replicator_drvdata *drvdata; @@ -80,11 +86,22 @@ static int replicator_probe(struct platform_device *pdev) return -ENOMEM; drvdata->dev = &pdev->dev; + drvdata->atclk = devm_clk_get(&pdev->dev, "atclk"); /* optional */ + if (!IS_ERR(drvdata->atclk)) { + ret = clk_prepare_enable(drvdata->atclk); + if (ret) + return ret; + } + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); platform_set_drvdata(pdev, drvdata); desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; + if (!desc) { + ret = -ENOMEM; + goto out_disable_pm; + } desc->type = CORESIGHT_DEV_TYPE_LINK; desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_SPLIT; @@ -92,11 +109,23 @@ static int replicator_probe(struct platform_device *pdev) desc->pdata = pdev->dev.platform_data; desc->dev = &pdev->dev; drvdata->csdev = coresight_register(desc); - if (IS_ERR(drvdata->csdev)) - return PTR_ERR(drvdata->csdev); + if (IS_ERR(drvdata->csdev)) { + ret = PTR_ERR(drvdata->csdev); + goto out_disable_pm; + } + + pm_runtime_put(&pdev->dev); dev_info(dev, "REPLICATOR initialized\n"); return 0; + +out_disable_pm: + if (!IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return ret; } static int replicator_remove(struct platform_device *pdev) @@ -104,9 +133,42 @@ static int replicator_remove(struct platform_device *pdev) struct replicator_drvdata *drvdata = platform_get_drvdata(pdev); coresight_unregister(drvdata->csdev); + pm_runtime_get_sync(&pdev->dev); + if (!IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_disable(&pdev->dev); + + return 0; +} + +#ifdef CONFIG_PM +static int replicator_runtime_suspend(struct device *dev) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + return 0; } +static int replicator_runtime_resume(struct device *dev) +{ + struct replicator_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); + + return 0; +} +#endif + +static const struct dev_pm_ops replicator_dev_pm_ops = { + SET_RUNTIME_PM_OPS(replicator_runtime_suspend, + replicator_runtime_resume, NULL) +}; + static const struct of_device_id replicator_match[] = { {.compatible = "arm,coresight-replicator"}, {} @@ -118,6 +180,7 @@ static struct platform_driver replicator_driver = { .driver = { .name = "coresight-replicator", .of_match_table = replicator_match, + .pm = &replicator_dev_pm_ops, }, };