From patchwork Fri May 22 15:29:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 6465631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7A4AB9F1C1 for ; Fri, 22 May 2015 15:39:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 73FCA200F3 for ; Fri, 22 May 2015 15:39:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 536EF200E8 for ; Fri, 22 May 2015 15:39:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YvozX-0001pR-4G; Fri, 22 May 2015 15:36:07 +0000 Received: from mail-pa0-f42.google.com ([209.85.220.42]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yvovn-0006RT-Bq for linux-arm-kernel@lists.infradead.org; Fri, 22 May 2015 15:32:16 +0000 Received: by pabru16 with SMTP id ru16so22429798pab.1 for ; Fri, 22 May 2015 08:31:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IEYUTp99Ducs2BDYvafpF9U/apUd7VWf535rC6wRoHU=; b=DAm5qcCayIDZMPF+m8USB3buqaC96vgULZ2NPBDSOnXbRwRquxa5SmS6YuumpTLjGn wfXKU4nsEZF0A92lv25fP8fp/qTXlJu0SOlOBPxLuxuvQpiXOMd4lBGR+Ti0Ai8RCvSL g0M51fdsD304w+37erNwHGYgk7obxpm4TmTZ+eGOb7XH2Bylijgxgfo3ZB4umhqjTCv9 cHtdlDAw3gPhs059HqP53JF3BzzrTPXLRdUukpLF8og2vsYXm0joOAsrnksvWVoGyANy DOisEMO1BY7VZPEgAdqtAWXhTP41D55NtSsMOWzJV9GX/hvkvoElvu0VU5uN8YMiF5+a L3wQ== X-Gm-Message-State: ALoCoQnIg/Sokjz1/bQW2XmLvL0/udwjYP9nEpJ4xXD58WUmuju4KFpeUWxhKtGE/wqT4k3ITosL X-Received: by 10.69.12.227 with SMTP id et3mr16725104pbd.11.1432308713150; Fri, 22 May 2015 08:31:53 -0700 (PDT) Received: from localhost.localdomain ([107.6.117.178]) by mx.google.com with ESMTPSA id as1sm2474485pbc.39.2015.05.22.08.31.46 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 May 2015 08:31:52 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 07/12] ARM: imx: move clock event variables into imx_timer Date: Fri, 22 May 2015 23:29:54 +0800 Message-Id: <1432308599-28643-8-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432308599-28643-1-git-send-email-shawn.guo@linaro.org> References: <1432308599-28643-1-git-send-email-shawn.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150522_083215_546842_03DEC6C0 X-CRM114-Status: GOOD ( 17.23 ) X-Spam-Score: -0.7 (/) Cc: Shawn Guo , Daniel Lezcano , Arnd Bergmann , kernel@pengutronix.de, Shenwei Wang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we now have imx_timer structure, it makes more sense to move those clock event related variables into the structure, so that we can save some global variables. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/time.c | 64 +++++++++++++++++++++++++----------------------- 1 file changed, 33 insertions(+), 31 deletions(-) diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index ceba782a1f1d..c4692e0a944f 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -83,9 +83,6 @@ #define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) #define timer_is_v2() (!timer_is_v1()) -static struct clock_event_device clockevent_mxc; -static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; - struct imx_timer { enum imx_gpt_type type; void __iomem *base; @@ -93,6 +90,9 @@ struct imx_timer { struct clk *clk_per; struct clk *clk_ipg; const struct imx_gpt_data *gpt; + struct clock_event_device ced; + enum clock_event_mode cem; + struct irqaction act; }; struct imx_gpt_data { @@ -103,6 +103,11 @@ struct imx_gpt_data { static void __iomem *timer_base; +static inline struct imx_timer *to_imx_timer(struct clock_event_device *ced) +{ + return container_of(ced, struct imx_timer, ced); +} + static inline void gpt_irq_disable(void) { unsigned int tmp; @@ -207,8 +212,9 @@ static const char *clock_event_mode_label[] = { #endif /* DEBUG */ static void mxc_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) + struct clock_event_device *ced) { + struct imx_timer *imxtm = to_imx_timer(ced); unsigned long flags; /* @@ -220,7 +226,7 @@ static void mxc_set_mode(enum clock_event_mode mode, /* Disable interrupt in GPT module */ gpt_irq_disable(); - if (mode != clockevent_mode) { + if (mode != imxtm->cem) { /* Set event time into far-far future */ if (timer_is_v2()) writel_relaxed(readl_relaxed(timer_base + V2_TCN) - 3, @@ -235,12 +241,12 @@ static void mxc_set_mode(enum clock_event_mode mode, #ifdef DEBUG printk(KERN_INFO "mxc_set_mode: changing mode from %s to %s\n", - clock_event_mode_label[clockevent_mode], + clock_event_mode_label[imxtm->cem], clock_event_mode_label[mode]); #endif /* DEBUG */ /* Remember timer mode */ - clockevent_mode = mode; + imxtm->cem = mode; local_irq_restore(flags); switch (mode) { @@ -272,7 +278,7 @@ static void mxc_set_mode(enum clock_event_mode mode, */ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) { - struct clock_event_device *evt = &clockevent_mxc; + struct clock_event_device *ced = dev_id; uint32_t tstat; if (timer_is_v2()) @@ -282,34 +288,33 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) gpt_irq_acknowledge(); - evt->event_handler(evt); + ced->event_handler(ced); return IRQ_HANDLED; } -static struct irqaction mxc_timer_irq = { - .name = "i.MX Timer Tick", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = mxc_timer_interrupt, -}; - -static struct clock_event_device clockevent_mxc = { - .name = "mxc_timer1", - .features = CLOCK_EVT_FEAT_ONESHOT, - .set_mode = mxc_set_mode, - .set_next_event = mx1_2_set_next_event, - .rating = 200, -}; - static int __init mxc_clockevent_init(struct imx_timer *imxtm) { - clockevent_mxc.set_next_event = imxtm->gpt->set_next_event; - clockevent_mxc.cpumask = cpumask_of(0); - clockevents_config_and_register(&clockevent_mxc, - clk_get_rate(imxtm->clk_per), + struct clock_event_device *ced = &imxtm->ced; + struct irqaction *act = &imxtm->act; + + imxtm->cem = CLOCK_EVT_MODE_UNUSED; + + ced->name = "mxc_timer1"; + ced->features = CLOCK_EVT_FEAT_ONESHOT; + ced->set_mode = mxc_set_mode; + ced->set_next_event = imxtm->gpt->set_next_event; + ced->rating = 200; + ced->cpumask = cpumask_of(0); + clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per), 0xff, 0xfffffffe); - return 0; + act->name = "i.MX Timer Tick"; + act->flags = IRQF_TIMER | IRQF_IRQPOLL; + act->handler = mxc_timer_interrupt; + act->dev_id = ced; + + return setup_irq(imxtm->irq, act); } static void imx1_gpt_setup_tctl(struct imx_timer *imxtm) @@ -415,9 +420,6 @@ static void __init _mxc_timer_init(struct imx_timer *imxtm) /* init and register the timer to the framework */ mxc_clocksource_init(imxtm); mxc_clockevent_init(imxtm); - - /* Make irqs happen */ - setup_irq(imxtm->irq, &mxc_timer_irq); } void __init mxc_timer_init(unsigned long pbase, int irq, enum imx_gpt_type type)