From patchwork Tue Jun 9 09:49:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 6570811 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 72E34C0020 for ; Tue, 9 Jun 2015 09:53:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 83BAA204E3 for ; Tue, 9 Jun 2015 09:53:21 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 94985204D5 for ; Tue, 9 Jun 2015 09:53:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2GBp-0005WQ-Vc; Tue, 09 Jun 2015 09:51:25 +0000 Received: from mail-pd0-f174.google.com ([209.85.192.174]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2GBA-0005B9-Km; Tue, 09 Jun 2015 09:50:45 +0000 Received: by pdjm12 with SMTP id m12so11326587pdj.3; Tue, 09 Jun 2015 02:50:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N+O4nTigK9O097isAEnm1xYfiipwwuKYmjMwE4oIlRs=; b=cAJluQ5nJLnUBbdWx07YU7zk+Mn5HSSvGNJuuI9T5O1t2NCfCowLjilQpNZWs13HVJ aGbjJUMQkOIltTMh7Vu73OVLCi+IJiUUn+/G+XR8Pe3FQZMiJvLjdeoB4QebV2ysrwVk GslKyK9HLm8Dt8ntYpu++okmBtUbB/fLq+4AG2dT732aey5q1gKjU1O/p0y1cvDYB6Tz 0RRc8/FzPcs921c+7KwR5P6rp3ID12WqaXVI6oBiac7wVOsqWmPRlQXUXd5oZDdj+jDh GE3Eijwvj46MamDezYi2jRVCMAFGNy7HlV6sN4pTeLqmmIS7E/WRamllIqzY/WkUi/NO Ct8A== X-Received: by 10.68.129.134 with SMTP id nw6mr37027119pbb.109.1433843422643; Tue, 09 Jun 2015 02:50:22 -0700 (PDT) Received: from localhost.localdomain ([191.101.57.10]) by mx.google.com with ESMTPSA id sc1sm5090052pac.36.2015.06.09.02.50.18 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 09 Jun 2015 02:50:21 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v6 3/3] ARM: rockchip: fix the SMP code style Date: Tue, 9 Jun 2015 17:49:59 +0800 Message-Id: <1433843400-24831-4-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433843400-24831-1-git-send-email-wxt@rock-chips.com> References: <1433843400-24831-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150609_025044_752088_39306121 X-CRM114-Status: GOOD ( 12.09 ) X-Spam-Score: -1.8 (-) Cc: Russell King , Dmitry Torokhov , dianders@chromium.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Caesar Wang X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use the below scripts to check: scripts/checkpatch.pl -f --subject arch/arm/mach-rockchip/platsmp.c Signed-off-by: Caesar Wang Reviewed-by: Douglas Anderson Reviewed-by: Kever Yang --- Changes in v6: - fix the commnet Unified format. Series-changes: 5 - Add the changelog. Series-changes: 2 - Use the checkpatch.pl -f --subjective to check. arch/arm/mach-rockchip/platsmp.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index d629206..30ccb82 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -100,7 +100,7 @@ static int pmu_set_power_domain(int pd, bool on) ret = pmu_power_domain_is_on(pd); if (ret < 0) { pr_err("%s: could not read power domain state\n", - __func__); + __func__); return ret; } } @@ -130,7 +130,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, if (cpu >= ncores) { pr_err("%s: cpu %d outside maximum number of cpus %d\n", - __func__, cpu, ncores); + __func__, cpu, ncores); return -ENXIO; } @@ -140,7 +140,8 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, return ret; if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { - /* We communicate with the bootrom to active the cpus other + /* + * We communicate with the bootrom to active the cpus other * than cpu0, after a blob of initialize code, they will * stay at wfe state, once they are actived, they will check * the mailbox: @@ -149,11 +150,11 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, * The cpu0 need to wait the other cpus other than cpu0 entering * the wfe state.The wait time is affected by many aspects. * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) - * */ + */ mdelay(1); /* ensure the cpus other than cpu0 to startup */ writel(virt_to_phys(rockchip_secondary_startup), - sram_base_addr + 8); + sram_base_addr + 8); writel(0xDEADBEAF, sram_base_addr + 4); dsb_sev(); } @@ -336,7 +337,7 @@ static int rockchip_cpu_kill(unsigned int cpu) static void rockchip_cpu_die(unsigned int cpu) { v7_exit_coherency_flush(louis); - while(1) + while (1) cpu_do_idle(); } #endif @@ -349,4 +350,5 @@ static struct smp_operations rockchip_smp_ops __initdata = { .cpu_die = rockchip_cpu_die, #endif }; + CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);