From patchwork Tue Jun 9 16:47:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 6574221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 66B01C0020 for ; Tue, 9 Jun 2015 17:13:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7E6CC20515 for ; Tue, 9 Jun 2015 17:13:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8C200204AD for ; Tue, 9 Jun 2015 17:13:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2N2x-0005M3-Qt; Tue, 09 Jun 2015 17:10:43 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2Mhl-0000UO-Fh for linux-arm-kernel@bombadil.infradead.org; Tue, 09 Jun 2015 16:48:49 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by casper.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2Mhg-0005Eq-6J for linux-arm-kernel@lists.infradead.org; Tue, 09 Jun 2015 16:48:47 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 0D3B92425; Tue, 9 Jun 2015 18:47:59 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (AToulouse-657-1-1089-115.w90-5.abo.wanadoo.fr [90.5.43.115]) by mail.free-electrons.com (Postfix) with ESMTPSA id 9E1FC871; Tue, 9 Jun 2015 18:47:59 +0200 (CEST) From: Thomas Petazzoni To: Linus Walleij , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement Subject: [PATCH 24/34] pinctrl: mvebu: armada-39x: normalize ref clock naming Date: Tue, 9 Jun 2015 18:47:16 +0200 Message-Id: <1433868446-11028-25-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1433868446-11028-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1433868446-11028-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150609_174844_242780_20B8338B X-CRM114-Status: GOOD ( 11.03 ) X-Spam-Score: -1.9 (-) Cc: Nadav Haklai , Lior Amsalem , Thomas Petazzoni , Tawfik Bayouk , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This commit normalizes the subnames of the reference clock MPP pins in the Armada 39x pinctrl driver to match with the name used on other SoCs. Since only the subnames are changed, DT backward compatibility is not affected. Signed-off-by: Thomas Petazzoni --- drivers/pinctrl/mvebu/pinctrl-armada-39x.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c index 433291a..08ee427 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-39x.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-39x.c @@ -205,7 +205,7 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6920_PLUS)), MPP_MODE(35, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS), MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6920_PLUS)), MPP_MODE(36, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), @@ -217,7 +217,7 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(8, "ge", "rxclk", V_88F6920_PLUS)), MPP_MODE(38, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(3, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6920_PLUS), MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6920_PLUS), MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6920_PLUS), MPP_VAR_FUNCTION(8, "ge", "rxd1", V_88F6920_PLUS)), @@ -263,12 +263,12 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = { MPP_VAR_FUNCTION(7, "led", "clk", V_88F6920_PLUS)), MPP_MODE(45, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6920_PLUS), MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS), MPP_VAR_FUNCTION(6, "ua1", "rxd", V_88F6920_PLUS)), MPP_MODE(46, MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS), - MPP_VAR_FUNCTION(1, "ref", "clk", V_88F6920_PLUS), + MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS), MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6920_PLUS), MPP_VAR_FUNCTION(6, "ua1", "txd", V_88F6920_PLUS), MPP_VAR_FUNCTION(7, "led", "stb", V_88F6920_PLUS)),