From patchwork Tue Jun 16 07:27:44 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 6613951 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C1F6EC0020 for ; Tue, 16 Jun 2015 07:31:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A8B0320531 for ; Tue, 16 Jun 2015 07:31:40 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DCC1C203C1 for ; Tue, 16 Jun 2015 07:31:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z4lJA-0008E6-8V; Tue, 16 Jun 2015 07:29:20 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z4lIn-00083I-3d; Tue, 16 Jun 2015 07:28:58 +0000 Received: by padev16 with SMTP id ev16so7445888pad.0; Tue, 16 Jun 2015 00:28:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2vZRuYEINhSEnm6LuRd/RIEk0sAbRi/6DQYvY//eUxg=; b=IJWT0JHknNGRIwXXEEmoPIGciSu+8O5QZE19d7jVC4Cw/Nj0WDskLXaro7mLvq2o3L 1klcuq8afIYTJ54uTpQPNO3IAQC6RVIchxdDvMobe1ZqOiq/GnWYpOJBFFWkLBESmVNX o9phfDgg2KNA5VzWSrhyY0sD96cs2TdqyBbsNVOrOztfKleuPOAkzEi0wdGQnuPt5xDH 6YfB8bzu60Id8iZGvq9CkWh9uvnBTmFoeq9mPdJZ0+xW1RJrwWxakhSdhxUu2lqPJ34F q+6SE7M/iduCdSphqmXXbsihDZzOQ6HnyNbx0IdAWn+thhH/AJuA3OMuWx+KcrpifC42 A1Ag== X-Received: by 10.66.168.11 with SMTP id zs11mr57355455pab.138.1434439715766; Tue, 16 Jun 2015 00:28:35 -0700 (PDT) Received: from localhost.localdomain ([191.101.57.48]) by mx.google.com with ESMTPSA id pr4sm266075pbb.30.2015.06.16.00.28.28 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Jun 2015 00:28:34 -0700 (PDT) From: Caesar Wang To: heiko@sntech.de Subject: [PATCH v2 2/3] soc/rockchip: efuse: Add Rockchip SoC efuse support Date: Tue, 16 Jun 2015 15:27:44 +0800 Message-Id: <1434439665-27781-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1434439665-27781-1-git-send-email-wxt@rock-chips.com> References: <1434439665-27781-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150616_002857_251127_40EADB44 X-CRM114-Status: GOOD ( 15.41 ) X-Spam-Score: -0.7 (/) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, linux@arm.linux.org.uk, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, galak@codeaurora.org, matthias.bgg@gmail.com, jay.xu@rock-chips.com, linux-arm-kernel@lists.infradead.org, wxt@rock-chips.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add driver for efuse found on Rockchip RK3066,RK3188,RK3288 and RK3368 SoCs. eFuse is organized as 32bits by 8 one-time programmable electrical fuses with random access interface. Signed-off-by: Jianqun Xu Signed-off-by: Caesar Wang --- Changes in v2: - Move the efuse driver into driver/soc/vendor. - update the efuse driver. drivers/soc/Makefile | 1 + drivers/soc/rockchip/Makefile | 4 + drivers/soc/rockchip/efuse.c | 212 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 217 insertions(+) create mode 100644 drivers/soc/rockchip/Makefile create mode 100644 drivers/soc/rockchip/efuse.c diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 70042b2..91f7f18 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ obj-$(CONFIG_ARCH_QCOM) += qcom/ +obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_SOC_TI) += ti/ obj-$(CONFIG_PLAT_VERSATILE) += versatile/ diff --git a/drivers/soc/rockchip/Makefile b/drivers/soc/rockchip/Makefile new file mode 100644 index 0000000..4f5f9bd --- /dev/null +++ b/drivers/soc/rockchip/Makefile @@ -0,0 +1,4 @@ +# +# Rockchip Soc drivers +# +obj-$(CONFIG_ARCH_ROCKCHIP) += efuse.o diff --git a/drivers/soc/rockchip/efuse.c b/drivers/soc/rockchip/efuse.c new file mode 100644 index 0000000..1125320 --- /dev/null +++ b/drivers/soc/rockchip/efuse.c @@ -0,0 +1,212 @@ +/* + * Rockchip eFuse Driver + * + * Copyright (c) 2015 Rockchip Electronics Co. Ltd. + * Author: Jianqun Xu + * Author: Caesar Wang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include + +#define EFUSE_A_SHIFT 6 +#define EFUSE_A_MASK 0x3ff +#define EFUSE_PGENB BIT(3) +#define EFUSE_LOAD BIT(2) +#define EFUSE_STROBE BIT(1) +#define EFUSE_CSB BIT(0) + +#define REG_EFUSE_CTRL 0x0000 +#define REG_EFUSE_DOUT 0x0004 + +#define EFUSE_BUF_SIZE 32 +#define EFUSE_CHIP_VERSION_OFFSET 6 +#define EFUSE_CHIP_VERSION_MASK 0xf +#define EFUSE_BUF_LKG_CPU 23 + +struct rockchip_efuse_info { + struct device *dev; + void __iomem *regs; + u32 buf[EFUSE_BUF_SIZE]; +}; + +static void efuse_writel(struct rockchip_efuse_info *efuse, + unsigned int value, + unsigned int offset) +{ + writel_relaxed(value, efuse->regs + offset); +} + +static unsigned int efuse_readl(struct rockchip_efuse_info *efuse, + unsigned int offset) +{ + return readl_relaxed(efuse->regs + offset); +} + +int rockchip_efuse_get_cpuleakage(struct platform_device *pdev, + unsigned int *value) +{ + struct rockchip_efuse_info *efuse; + + efuse = platform_get_drvdata(pdev); + if (!efuse) + return -EAGAIN; + + *value = efuse->buf[EFUSE_BUF_LKG_CPU]; + + return 0; +} +EXPORT_SYMBOL_GPL(rockchip_efuse_get_cpuleakage); + +int rockchip_efuse_get_chip_version(struct platform_device *pdev, + unsigned int *value) +{ + struct rockchip_efuse_info *efuse; + + efuse = platform_get_drvdata(pdev); + if (!efuse) + return -EAGAIN; + + *value = efuse->buf[EFUSE_CHIP_VERSION_OFFSET] & + EFUSE_CHIP_VERSION_MASK; + + return 0; +} +EXPORT_SYMBOL_GPL(rockchip_efuse_get_chip_version); + +static ssize_t cpu_leakage_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int leakage; + int ret; + struct platform_device *pdev = to_platform_device(dev); + + ret = rockchip_efuse_get_cpuleakage(pdev, &leakage); + if (ret) + return ret; + + return sprintf(buf, "%d\n", leakage); +} + +static ssize_t cpu_version_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int version; + int ret; + struct platform_device *pdev = to_platform_device(dev); + + ret = rockchip_efuse_get_chip_version(pdev, &version); + if (ret) + return ret; + + return sprintf(buf, "%d\n", version); +} + +static void rockchip_efuse_init(struct rockchip_efuse_info *efuse) +{ + unsigned int start; + + efuse_writel(efuse, EFUSE_LOAD | EFUSE_PGENB, REG_EFUSE_CTRL); + udelay(1); + + for (start = 0; start <= EFUSE_BUF_SIZE; start++) { + efuse_writel(efuse, efuse_readl(efuse, REG_EFUSE_CTRL) & + (~(EFUSE_A_MASK << EFUSE_A_SHIFT)), + REG_EFUSE_CTRL); + efuse_writel(efuse, efuse_readl(efuse, REG_EFUSE_CTRL) | + ((start & EFUSE_A_MASK) << EFUSE_A_SHIFT), + REG_EFUSE_CTRL); + udelay(1); + efuse_writel(efuse, efuse_readl(efuse, REG_EFUSE_CTRL) | + EFUSE_STROBE, REG_EFUSE_CTRL); + udelay(1); + + efuse->buf[start] = efuse_readl(efuse, REG_EFUSE_DOUT); + + efuse_writel(efuse, efuse_readl(efuse, REG_EFUSE_CTRL) & + (~EFUSE_STROBE), REG_EFUSE_CTRL); + udelay(1); + } + + /* Switch to standby mode */ + efuse_writel(efuse, EFUSE_PGENB | EFUSE_CSB, REG_EFUSE_CTRL); +} + +static DEVICE_ATTR(cpu_leakage_show, 0444, cpu_leakage_show, NULL); +static DEVICE_ATTR(cpu_version_show, 0444, cpu_version_show, NULL); + +static struct attribute *efuse_attributes[] = { + &dev_attr_cpu_leakage_show.attr, + &dev_attr_cpu_version_show.attr, + NULL, +}; + +static const struct attribute_group efuse_attr_group = { + .attrs = efuse_attributes, +}; + +static int rockchip_efuse_probe(struct platform_device *pdev) +{ + struct rockchip_efuse_info *efuse; + struct resource *mem; + int ret; + + efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_info), + GFP_KERNEL); + if (!efuse) + return -ENOMEM; + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + efuse->regs = devm_ioremap_resource(&pdev->dev, mem); + if (IS_ERR(efuse->regs)) + return PTR_ERR(efuse->regs); + + efuse->dev = &pdev->dev; + + rockchip_efuse_init(efuse); + + /* + * We set driver data only after fully initializing efuse + * to make sure rockchip_efuse_get_cpuleakage() and + * rockchip_efuse_get_cpu_version do not return garbage. + */ + platform_set_drvdata(pdev, efuse); + + ret = sysfs_create_group(&efuse->dev->kobj, &efuse_attr_group); + if (ret) { + dev_err(efuse->dev, + "failed to register sysfs. err: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct of_device_id rockchip_efuse_match[] = { + { .compatible = "rockchip,rk3066-efuse", }, + { /* sentinel */}, +}; + +static struct platform_driver rockchip_efuse_driver = { + .probe = rockchip_efuse_probe, + .driver = { + .name = "rockchip-efuse", + .of_match_table = of_match_ptr(rockchip_efuse_match), + .suppress_bind_attrs = true, + }, +}; + +module_platform_driver(rockchip_efuse_driver);