From patchwork Wed Jun 17 11:22:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 6624191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B7314C0020 for ; Wed, 17 Jun 2015 11:25:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A03A6208D0 for ; Wed, 17 Jun 2015 11:25:56 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 65369208E0 for ; Wed, 17 Jun 2015 11:25:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5BR4-0006Zs-Qk; Wed, 17 Jun 2015 11:23:14 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5BQS-0006Gm-NG for linux-arm-kernel@lists.infradead.org; Wed, 17 Jun 2015 11:22:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1AF6C5BC; Wed, 17 Jun 2015 04:22:20 -0700 (PDT) Received: from e104803-lin.lan (unknown [10.1.203.153]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0BDB93F212; Wed, 17 Jun 2015 04:22:01 -0700 (PDT) From: Andre Przywara To: will.deacon@arm.com, marc.zyngier@arm.com Subject: [PATCH v3 10/10] arm: use new irqchip parameter to create different vGIC types Date: Wed, 17 Jun 2015 12:22:01 +0100 Message-Id: <1434540121-21283-11-git-send-email-andre.przywara@arm.com> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1434540121-21283-1-git-send-email-andre.przywara@arm.com> References: <1434540121-21283-1-git-send-email-andre.przywara@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150617_042236_943107_1F506959 X-CRM114-Status: GOOD ( 12.60 ) X-Spam-Score: -5.6 (-----) Cc: penberg@kernel.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently we unconditionally create a virtual GICv2 in the guest. Add a --irqchip= parameter to let the user specify a different GIC type for the guest. For now we the only other supported type is GICv3. Signed-off-by: Andre Przywara --- arm/aarch64/arm-cpu.c | 2 +- arm/gic.c | 17 +++++++++++++++++ arm/include/arm-common/kvm-config-arch.h | 9 ++++++++- arm/kvm.c | 2 +- 4 files changed, 27 insertions(+), 3 deletions(-) diff --git a/arm/aarch64/arm-cpu.c b/arm/aarch64/arm-cpu.c index f702b9e..3dc8ea3 100644 --- a/arm/aarch64/arm-cpu.c +++ b/arm/aarch64/arm-cpu.c @@ -12,7 +12,7 @@ static void generate_fdt_nodes(void *fdt, struct kvm *kvm, u32 gic_phandle) { int timer_interrupts[4] = {13, 14, 11, 10}; - gic__generate_fdt_nodes(fdt, gic_phandle, IRQCHIP_GICV2); + gic__generate_fdt_nodes(fdt, gic_phandle, kvm->cfg.arch.irqchip); timer__generate_fdt_nodes(fdt, kvm, timer_interrupts); } diff --git a/arm/gic.c b/arm/gic.c index efe4b42..5b49416 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -22,6 +22,23 @@ static int gic_fd = -1; static u64 gic_redists_base; static u64 gic_redists_size; +int irqchip_parser(const struct option *opt, const char *arg, int unset) +{ + enum irqchip_type *type = opt->value; + + *type = IRQCHIP_GICV2; + if (!strcmp(arg, "gicv2")) { + *type = IRQCHIP_GICV2; + } else if (!strcmp(arg, "gicv3")) { + *type = IRQCHIP_GICV3; + } else if (strcmp(arg, "default")) { + fprintf(stderr, "irqchip: unknown type \"%s\"\n", arg); + return -1; + } + + return 0; +} + static int gic__create_device(struct kvm *kvm, enum irqchip_type type) { int err; diff --git a/arm/include/arm-common/kvm-config-arch.h b/arm/include/arm-common/kvm-config-arch.h index a8ebd94..9529881 100644 --- a/arm/include/arm-common/kvm-config-arch.h +++ b/arm/include/arm-common/kvm-config-arch.h @@ -8,8 +8,11 @@ struct kvm_config_arch { unsigned int force_cntfrq; bool virtio_trans_pci; bool aarch32_guest; + enum irqchip_type irqchip; }; +int irqchip_parser(const struct option *opt, const char *arg, int unset); + #define OPT_ARCH_RUN(pfx, cfg) \ pfx, \ ARM_OPT_ARCH_RUN(cfg) \ @@ -21,6 +24,10 @@ struct kvm_config_arch { "updated to program CNTFRQ correctly*"), \ OPT_BOOLEAN('\0', "force-pci", &(cfg)->virtio_trans_pci, \ "Force virtio devices to use PCI as their default " \ - "transport"), + "transport"), \ + OPT_CALLBACK('\0', "irqchip", &(cfg)->irqchip, \ + "[gicv2|gicv3]", \ + "type of interrupt controller to emulate in the guest", \ + irqchip_parser, NULL), #endif /* ARM_COMMON__KVM_CONFIG_ARCH_H */ diff --git a/arm/kvm.c b/arm/kvm.c index f9685c2..d0e4a20 100644 --- a/arm/kvm.c +++ b/arm/kvm.c @@ -82,6 +82,6 @@ void kvm__arch_init(struct kvm *kvm, const char *hugetlbfs_path, u64 ram_size) MADV_MERGEABLE | MADV_HUGEPAGE); /* Create the virtual GIC. */ - if (gic__create(kvm, IRQCHIP_GICV2)) + if (gic__create(kvm, kvm->cfg.arch.irqchip)) die("Failed to create virtual GIC"); }