From patchwork Thu Jun 18 18:01:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Shu X-Patchwork-Id: 6639851 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 61A67C0020 for ; Thu, 18 Jun 2015 18:05:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5CD5220649 for ; Thu, 18 Jun 2015 18:05:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 462D220623 for ; Thu, 18 Jun 2015 18:05:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5e9x-0000Y4-IH; Thu, 18 Jun 2015 18:03:29 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5e8V-0008GP-Uw; Thu, 18 Jun 2015 18:02:00 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5e8U-0007qd-31; Thu, 18 Jun 2015 18:01:58 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 258326450; Fri, 19 Jun 2015 02:01:27 +0800 Received: from mtkslt201.mediatek.inc (10.21.15.54) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 19 Jun 2015 02:01:26 +0800 From: Scott Shu To: , , , , , , , , , , Subject: [RESEND PATCH 3/6] ARM: mediatek: add smp bringup code for MT6580 Date: Fri, 19 Jun 2015 02:01:18 +0800 Message-ID: <1434650481-39421-4-git-send-email-scott.shu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1434650481-39421-1-git-send-email-scott.shu@mediatek.com> References: <1434650481-39421-1-git-send-email-scott.shu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150618_140158_557478_D0D684D5 X-CRM114-Status: GOOD ( 15.67 ) X-Spam-Score: -1.1 (-) Cc: srv_wsdupstream@mediatek.com, Scott Shu , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for cpu enable-method "mediatek,mt6580-smp" for booting secondary CPUs on MT6580. --- arch/arm/mach-mediatek/platsmp.c | 107 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm/mach-mediatek/platsmp.c b/arch/arm/mach-mediatek/platsmp.c index 12fefb3..2985913 100644 --- a/arch/arm/mach-mediatek/platsmp.c +++ b/arch/arm/mach-mediatek/platsmp.c @@ -21,10 +21,15 @@ #include #include #include +#include +#include +#include "generic.h" #define MTK_MAX_CPU 8 #define MTK_SMP_REG_SIZE 0x1000 +static DEFINE_SPINLOCK(boot_lock); + struct mtk_smp_boot_info { unsigned long smp_base; unsigned int jump_reg; @@ -57,6 +62,101 @@ static const struct of_device_id mtk_smp_boot_infos[] __initconst = { static void __iomem *mtk_smp_base; static const struct mtk_smp_boot_info *mtk_smp_info; +static void __cpuinit write_pen_release(int val) +{ + pen_release = val; + /* Make sure this is visible to other CPUs */ + smp_wmb(); + sync_cache_w(&pen_release); +} + +static int mt6580_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + + /* + * Set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from + * the holding pen - release it, then wait for it to flag + * that it has been released by resetting pen_release. + * + * Note that "pen_release" is the hardware CPU ID, whereas + * "cpu" is Linux's internal ID. + */ + write_pen_release(cpu); + + /* + * CPU power on control by SPM + */ + spm_cpu_mtcmos_on(cpu); + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + /* Read barrier */ + smp_rmb(); + + if (pen_release == -1) + break; + + usleep_range(10, 1000); + } + + /* + * Now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return (pen_release != -1 ? -EINVAL : 0); +} + +static void mt6580_secondary_init(unsigned int cpu) +{ + /* + * Let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + write_pen_release(-1); + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +#define MT6580_INFRACFG_AO 0x10001000 +#define SW_ROM_PD BIT(31) + +static void __init mt6580_smp_prepare_cpus(unsigned int max_cpus) +{ + static void __iomem *infracfg_ao_base; + + infracfg_ao_base = ioremap(MT6580_INFRACFG_AO, 0x1000); + + if (!infracfg_ao_base) + pr_err("%s: Unable to map I/O memory\n", __func__); + + /* Enable bootrom power down mode */ + writel_relaxed(readl(infracfg_ao_base + 0x804) | SW_ROM_PD, + infracfg_ao_base + 0x804); + + /* Write the address of slave startup into boot address + register for bootrom power down mode */ + writel_relaxed(virt_to_phys(secondary_startup_arm), + infracfg_ao_base + 0x800); + + iounmap(infracfg_ao_base); + + /* Initial spm cpu mtcmos memory map */ + spm_cpu_mtcmos_init(); +} + static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) { if (!mtk_smp_base) @@ -143,3 +243,10 @@ static struct smp_operations mt65xx_smp_ops __initdata = { .smp_boot_secondary = mtk_boot_secondary, }; CPU_METHOD_OF_DECLARE(mt65xx_smp, "mediatek,mt65xx-smp", &mt65xx_smp_ops); + +static struct smp_operations mt6580_smp_ops __initdata = { + .smp_prepare_cpus = mt6580_smp_prepare_cpus, + .smp_secondary_init = mt6580_secondary_init, + .smp_boot_secondary = mt6580_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mt6580_smp, "mediatek,mt6580-smp", &mt6580_smp_ops);