diff mbox

[6/7] ARM: brcmstb: mask GIC IRQs on suspend

Message ID 1434672696-13632-7-git-send-email-computersforpeace@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Brian Norris June 19, 2015, 12:11 a.m. UTC
Lazily-masked IRQs can cause system suspend problems (e.g., spurious
wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
masked, not just disabled, during system suspend.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
---
 arch/arm/mach-bcm/brcmstb.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Gregory Fong June 19, 2015, 1:48 a.m. UTC | #1
On Thu, Jun 18, 2015 at 5:11 PM, Brian Norris
<computersforpeace@gmail.com> wrote:
> Lazily-masked IRQs can cause system suspend problems (e.g., spurious
> wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
> masked, not just disabled, during system suspend.
>
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>

Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Florian Fainelli Sept. 12, 2015, 7:53 p.m. UTC | #2
Le 06/18/15 17:11, Brian Norris a écrit :
> Lazily-masked IRQs can cause system suspend problems (e.g., spurious
> wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
> masked, not just disabled, during system suspend.
> 
> Signed-off-by: Brian Norris <computersforpeace@gmail.com>

Dropped this patch, no longer needed as of 4.3-rc0 with
aec89ef72ba6c94420f599dcb684ed66937cdacf ("irqchip/gic: Enable
SKIP_SET_WAKE and MASK_ON_SUSPEND")
Brian Norris Sept. 14, 2015, 5:29 p.m. UTC | #3
On Sat, Sep 12, 2015 at 12:53:32PM -0700, Florian Fainelli wrote:
> Le 06/18/15 17:11, Brian Norris a écrit :
> > Lazily-masked IRQs can cause system suspend problems (e.g., spurious
> > wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
> > masked, not just disabled, during system suspend.
> > 
> > Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> 
> Dropped this patch, no longer needed as of 4.3-rc0 with

Ooh, rc0! I didn't know we started doing sane numbering :)

> aec89ef72ba6c94420f599dcb684ed66937cdacf ("irqchip/gic: Enable
> SKIP_SET_WAKE and MASK_ON_SUSPEND")

Nice! I was wanting this done for a while, but I believe this approach
was rejected a few times before. Glad Sudeep dug to the bottom of the
issue to argue *why* that's the right thing to do.

Brian
Brian Norris Sept. 14, 2015, 5:42 p.m. UTC | #4
One more thing:

On Sat, Sep 12, 2015 at 12:53:32PM -0700, Florian Fainelli wrote:
> Le 06/18/15 17:11, Brian Norris a écrit :
> > Lazily-masked IRQs can cause system suspend problems (e.g., spurious
> > wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
> > masked, not just disabled, during system suspend.
> > 
> > Signed-off-by: Brian Norris <computersforpeace@gmail.com>
> 
> Dropped this patch, no longer needed as of 4.3-rc0 with
> aec89ef72ba6c94420f599dcb684ed66937cdacf ("irqchip/gic: Enable
> SKIP_SET_WAKE and MASK_ON_SUSPEND")

With this patch dropped, then we really don't need
arch/arm/mach-bcm/brcmstb.c any more, AFAICT. Unless you have more plans
for this file, I can send a patch...

Brian
Florian Fainelli Sept. 14, 2015, 5:43 p.m. UTC | #5
On 14/09/15 10:42, Brian Norris wrote:
> One more thing:
> 
> On Sat, Sep 12, 2015 at 12:53:32PM -0700, Florian Fainelli wrote:
>> Le 06/18/15 17:11, Brian Norris a écrit :
>>> Lazily-masked IRQs can cause system suspend problems (e.g., spurious
>>> wakeups from WFI), so we need to be sure non-wakeup GIC interrupts get
>>> masked, not just disabled, during system suspend.
>>>
>>> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
>>
>> Dropped this patch, no longer needed as of 4.3-rc0 with
>> aec89ef72ba6c94420f599dcb684ed66937cdacf ("irqchip/gic: Enable
>> SKIP_SET_WAKE and MASK_ON_SUSPEND")
> 
> With this patch dropped, then we really don't need
> arch/arm/mach-bcm/brcmstb.c any more, AFAICT. Unless you have more plans
> for this file, I can send a patch...

I am in the process of cleaning up the BIU control register setup for
the memory controller write-pairing support to get that submitted, and
that needs to be initialized before SMP, so we will still need an entry
point in the machine code to do that.

Thanks!
diff mbox

Patch

diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
index 3a60f7ee3f0c..8d9ec9d01306 100644
--- a/arch/arm/mach-bcm/brcmstb.c
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -12,11 +12,20 @@ 
  */
 
 #include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/arm-gic.h>
 #include <linux/of_platform.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+static void __init brcmstb_init_irq(void)
+{
+	gic_set_irqchip_flags(IRQCHIP_MASK_ON_SUSPEND);
+	irqchip_init();
+}
+
 static const char *const brcmstb_match[] __initconst = {
 	"brcm,bcm7445",
 	"brcm,brcmstb",
@@ -25,4 +34,5 @@  static const char *const brcmstb_match[] __initconst = {
 
 DT_MACHINE_START(BRCMSTB, "Broadcom STB (Flattened Device Tree)")
 	.dt_compat	= brcmstb_match,
+	.init_irq	= brcmstb_init_irq,
 MACHINE_END