From patchwork Tue Jun 23 18:00:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Moritz Fischer X-Patchwork-Id: 6662631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8EF3EC05AC for ; Tue, 23 Jun 2015 18:05:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2B17820685 for ; Tue, 23 Jun 2015 18:05:36 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BCA0C20672 for ; Tue, 23 Jun 2015 18:05:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z7SWH-0003e7-Ss; Tue, 23 Jun 2015 18:02:01 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z7SV9-0002hF-BJ for linux-arm-kernel@lists.infradead.org; Tue, 23 Jun 2015 18:00:53 +0000 Received: by pdcu2 with SMTP id u2so12041921pdc.3 for ; Tue, 23 Jun 2015 11:00:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vI9vYo4SCVoutwvvMRGgwSvvPHGeEd3HNpCzQRe5KP8=; b=HJyfjfmvNQdPsxJx1BOze3Y5roAPEMiY+I9IL1gDziPh9S78iA5gv40bxv/gWgWbKx jINNXZwYxw2RYmBOZd3y3djK4+CKx8UypBzMpFdWCYJEm95jpdcTtyxn51/ofDNEI1RB PPK9pA8M+PQxPirD8SXGmIP1AAde+d6UuSyyq6FuSr5l9dwMJ+HfriHJY4y07CI2UnQM 7zroejp5iOuwwcc5ZOXmS41M/WCpU5H8omCqeSxElzrr8DTBIOyP7XcobMjZstnIajXs s788ODQbTh1alxaMkVy0rGSpX6tdUVL2SrR3VHqGfPJSNT6NBuR9o53aCsu6jSpnKMiD EOYA== X-Gm-Message-State: ALoCoQmb4xT1IF+soXAPI8Y9P1J//x25ijwgrKVnRkz8zo/BbEeC1v3RAtWHgtuLx+Fi/VMKn2iK X-Received: by 10.70.118.73 with SMTP id kk9mr72361635pdb.150.1435082427919; Tue, 23 Jun 2015 11:00:27 -0700 (PDT) Received: from fenrir.amer.corp.natinst.com (209-234-137-234.static.twtelecom.net. [209.234.137.234]) by mx.google.com with ESMTPSA id dc8sm24001581pdb.23.2015.06.23.11.00.25 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Jun 2015 11:00:26 -0700 (PDT) From: Moritz Fischer To: jassisinghbrar@gmail.com Subject: [PATCHv5 2/2] mailbox: Adding driver for Xilinx LogiCORE IP mailbox. Date: Tue, 23 Jun 2015 11:00:02 -0700 Message-Id: <1435082402-29239-3-git-send-email-moritz.fischer@ettus.com> X-Mailer: git-send-email 2.4.2 In-Reply-To: <1435082402-29239-1-git-send-email-moritz.fischer@ettus.com> References: <1435082402-29239-1-git-send-email-moritz.fischer@ettus.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150623_110051_499223_73F1076F X-CRM114-Status: GOOD ( 25.42 ) X-Spam-Score: -2.6 (--) Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Moritz Fischer , arnd@arndb.de, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, gregkh@linuxfoundation.org, mchehab@osg.samsung.com, linux-kernel@vger.kernel.org, michal.simek@xilinx.com, jingoohan1@gmail.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, galak@codeaurora.org, joe@perches.com, akpm@linux-foundation.org, soren.brinkmann@xilinx.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Xilinx LogiCORE IP mailbox is a FPGA core that allows for interprocessor communication via AXI4 memory mapped / AXI4 stream interfaces. It is single channel per core and allows for transmit and receive. Changes from v4: - Have separate mbox_ops structs for polling / irq mode - Moved clk handling to startup / shutdown - Embedded struct mbox_chan in struct xilinx_mbox - Misc stylistic issues Changes from v3: - Stylistic Changes from v2: - Fixed error handling for IRQ from >= 0 to > 0 - Fixed error handling for clock enabling - Addressed Michal's stylistic comments Changes from v1: - Added common clock framework support - Deal with IRQs that happend before driver load, since HW will not let us know about them when we enable IRQs Changes from v0: - Several stylistic issues - Dropped superfluous intr_mode member - Really masking the IRQs on mailbox_shutdown - No longer using polling by accident in non-IRQ mode - Swapped doc and driver commits Signed-off-by: Moritz Fischer Acked-by: Michal Simek mailbox: Address some feedback, make ops const. Signed-off-by: Moritz Fischer mailbox: xilinx-mailbox: Addressed more of Josh's feedback. Signed-off-by: Moritz Fischer --- MAINTAINERS | 7 + drivers/mailbox/Kconfig | 8 + drivers/mailbox/Makefile | 2 + drivers/mailbox/mailbox-xilinx.c | 375 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 392 insertions(+) create mode 100644 drivers/mailbox/mailbox-xilinx.c diff --git a/MAINTAINERS b/MAINTAINERS index 4f1e79b..cb88b4a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10998,6 +10998,13 @@ M: John Linn S: Maintained F: drivers/net/ethernet/xilinx/xilinx_axienet* +XILINX MAILBOX DRIVER +M: Moritz Fischer +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/mailbox/mailbox-xilinx.c +F: Documentation/devicetree/bindings/mailbox/xilinx-mailbox.txt + XILINX UARTLITE SERIAL DRIVER M: Peter Korsgaard L: linux-serial@vger.kernel.org diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index 84b0a2d..e11e4b2 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -60,4 +60,12 @@ config ALTERA_MBOX An implementation of the Altera Mailbox soft core. It is used to send message between processors. Say Y here if you want to use the Altera mailbox support. + +config XILINX_MBOX + tristate "Xilinx Mailbox" + help + An implementation of the Xilinx Mailbox soft core. It is used + to send message between processors. Say Y here if you want to use the + Xilinx mailbox support. + endif diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index b18201e..d28a028 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -11,3 +11,5 @@ obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o obj-$(CONFIG_PCC) += pcc.o obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o + +obj-$(CONFIG_XILINX_MBOX) += mailbox-xilinx.o diff --git a/drivers/mailbox/mailbox-xilinx.c b/drivers/mailbox/mailbox-xilinx.c new file mode 100644 index 0000000..9d6364c --- /dev/null +++ b/drivers/mailbox/mailbox-xilinx.c @@ -0,0 +1,375 @@ +/* + * Copyright (c) 2015, National Instruments Corp. All rights reserved. + * + * Driver for the Xilinx LogiCORE mailbox IP block + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* register offsets */ +#define MAILBOX_REG_WRDATA 0x00 +#define MAILBOX_REG_RDDATA 0x08 +#define MAILBOX_REG_STATUS 0x10 +#define MAILBOX_REG_ERROR 0x14 +#define MAILBOX_REG_SIT 0x18 +#define MAILBOX_REG_RIT 0x1c +#define MAILBOX_REG_IS 0x20 +#define MAILBOX_REG_IE 0x24 +#define MAILBOX_REG_IP 0x28 + +/* status register */ +#define STS_RTA BIT(3) +#define STS_STA BIT(2) +#define STS_FULL BIT(1) +#define STS_EMPTY BIT(0) + +/* error register */ +#define ERR_FULL BIT(1) +#define ERR_EMPTY BIT(0) + +/* mailbox interrupt status register */ +#define INT_STATUS_ERR BIT(2) +#define INT_STATUS_RTI BIT(1) +#define INT_STATUS_STI BIT(0) + +/* mailbox interrupt enable register */ +#define INT_ENABLE_ERR BIT(2) +#define INT_ENABLE_RTI BIT(1) +#define INT_ENABLE_STI BIT(0) + +#define MBOX_POLLING_MS 5 /* polling interval 5ms */ + +struct xilinx_mbox { + int irq; + void __iomem *mbox_base; + struct clk *clk; + struct device *dev; + struct mbox_controller controller; + struct mbox_chan chan; + + /* if the controller supports only RX polling mode */ + struct timer_list rxpoll_timer; +}; + +static struct xilinx_mbox *mbox_chan_to_xilinx_mbox(struct mbox_chan *chan) +{ + return container_of(chan, struct xilinx_mbox, chan); +} + +static inline bool xilinx_mbox_full(struct xilinx_mbox *mbox) +{ + u32 status; + + status = readl_relaxed(mbox->mbox_base + MAILBOX_REG_STATUS); + + return status & STS_FULL; +} + +static inline bool xilinx_mbox_pending(struct xilinx_mbox *mbox) +{ + u32 status; + + status = readl_relaxed(mbox->mbox_base + MAILBOX_REG_STATUS); + + return !(status & STS_EMPTY); +} + +static void xilinx_mbox_intmask(struct xilinx_mbox *mbox, u32 mask, bool enable) +{ + u32 mask_reg; + + mask_reg = readl_relaxed(mbox->mbox_base + MAILBOX_REG_IE); + if (enable) + mask_reg |= mask; + else + mask_reg &= ~mask; + + writel_relaxed(mask_reg, mbox->mbox_base + MAILBOX_REG_IE); +} + +static inline void xilinx_mbox_rx_intmask(struct xilinx_mbox *mbox, bool enable) +{ + xilinx_mbox_intmask(mbox, INT_ENABLE_RTI, enable); +} + +static inline void xilinx_mbox_tx_intmask(struct xilinx_mbox *mbox, bool enable) +{ + xilinx_mbox_intmask(mbox, INT_ENABLE_STI, enable); +} + +static void xilinx_mbox_rx_data(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + u32 data; + + if (xilinx_mbox_pending(mbox)) { + data = readl_relaxed(mbox->mbox_base + MAILBOX_REG_RDDATA); + mbox_chan_received_data(chan, (void *)data); + } +} + +static void xilinx_mbox_poll_rx(unsigned long data) +{ + struct mbox_chan *chan = (struct mbox_chan *)data; + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + xilinx_mbox_rx_data(chan); + + mod_timer(&mbox->rxpoll_timer, + jiffies + msecs_to_jiffies(MBOX_POLLING_MS)); +} + +static irqreturn_t xilinx_mbox_interrupt(int irq, void *p) +{ + u32 mask; + struct mbox_chan *chan = (struct mbox_chan *)p; + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + mask = readl_relaxed(mbox->mbox_base + MAILBOX_REG_IS); + if (mask & INT_STATUS_RTI) + xilinx_mbox_rx_data(chan); + + /* mask irqs *before* notifying done, require tx_block=true */ + if (mask & INT_STATUS_STI) { + xilinx_mbox_tx_intmask(mbox, false); + mbox_chan_txdone(chan, 0); + } + + writel_relaxed(mask, mbox->mbox_base + MAILBOX_REG_IS); + + return IRQ_HANDLED; +} + +static int xilinx_mbox_irq_startup(struct mbox_chan *chan) +{ + int ret; + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + ret = request_irq(mbox->irq, xilinx_mbox_interrupt, 0, + dev_name(mbox->dev), chan); + if (unlikely(ret)) { + dev_err(mbox->dev, + "failed to register mailbox interrupt:%d\n", + ret); + return ret; + } + + /* prep and enable the clock */ + clk_prepare_enable(mbox->clk); + + xilinx_mbox_rx_intmask(mbox, true); + + /* if fifo was full already, we didn't get an interrupt */ + while (xilinx_mbox_pending(mbox)) + xilinx_mbox_rx_data(chan); + + return 0; +} + +static int xilinx_mbox_poll_startup(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + /* prep and enable the clock */ + clk_prepare_enable(mbox->clk); + + /* setup polling timer */ + setup_timer(&mbox->rxpoll_timer, xilinx_mbox_poll_rx, + (unsigned long)chan); + mod_timer(&mbox->rxpoll_timer, + jiffies + msecs_to_jiffies(MBOX_POLLING_MS)); + + return 0; +} + +static int xilinx_mbox_irq_send_data(struct mbox_chan *chan, void *data) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + u32 *udata = data; + + if (!mbox || !data) + return -EINVAL; + + if (xilinx_mbox_full(mbox)) + return -EBUSY; + + /* enable interrupt before send */ + xilinx_mbox_tx_intmask(mbox, true); + + writel_relaxed(*udata, mbox->mbox_base + MAILBOX_REG_WRDATA); + + return 0; +} + +static int xilinx_mbox_poll_send_data(struct mbox_chan *chan, void *data) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + u32 *udata = data; + + if (!mbox || !data) + return -EINVAL; + + if (xilinx_mbox_full(mbox)) + return -EBUSY; + + writel_relaxed(*udata, mbox->mbox_base + MAILBOX_REG_WRDATA); + + return 0; +} + +static bool xilinx_mbox_last_tx_done(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + /* return false if mailbox is full */ + return !xilinx_mbox_full(mbox); +} + +static bool xilinx_mbox_peek_data(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + return xilinx_mbox_pending(mbox); +} + +static void xilinx_mbox_irq_shutdown(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + /* mask all interrupts */ + writel_relaxed(0, mbox->mbox_base + MAILBOX_REG_IE); + + clk_disable_unprepare(mbox->clk); + + free_irq(mbox->irq, chan); +} + +static void xilinx_mbox_poll_shutdown(struct mbox_chan *chan) +{ + struct xilinx_mbox *mbox = mbox_chan_to_xilinx_mbox(chan); + + del_timer_sync(&mbox->rxpoll_timer); + + clk_disable_unprepare(mbox->clk); +} + +static struct mbox_chan_ops xilinx_mbox_irq_ops = { + .send_data = xilinx_mbox_irq_send_data, + .startup = xilinx_mbox_irq_startup, + .shutdown = xilinx_mbox_irq_shutdown, + .last_tx_done = xilinx_mbox_last_tx_done, + .peek_data = xilinx_mbox_peek_data, +}; + +static struct mbox_chan_ops xilinx_mbox_poll_ops = { + .send_data = xilinx_mbox_poll_send_data, + .startup = xilinx_mbox_poll_startup, + .shutdown = xilinx_mbox_poll_shutdown, + .last_tx_done = xilinx_mbox_last_tx_done, + .peek_data = xilinx_mbox_peek_data, +}; + +static int xilinx_mbox_probe(struct platform_device *pdev) +{ + struct xilinx_mbox *mbox; + struct resource *regs; + int ret; + + mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL); + if (!mbox) + return -ENOMEM; + + /* get clk and enable */ + mbox->clk = devm_clk_get(&pdev->dev, "mbox"); + if (IS_ERR(mbox->clk)) { + dev_err(&pdev->dev, "Couldn't get clk.\n"); + return PTR_ERR(mbox->clk); + } + + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + mbox->mbox_base = devm_ioremap_resource(&pdev->dev, regs); + if (IS_ERR(mbox->mbox_base)) + return PTR_ERR(mbox->mbox_base); + + mbox->irq = platform_get_irq(pdev, 0); + /* if irq is present, we can use it, otherwise, poll */ + if (mbox->irq > 0) { + mbox->controller.txdone_irq = true; + } else { + dev_info(&pdev->dev, "IRQ not found, fallback to polling.\n"); + mbox->controller.txdone_poll = true; + mbox->controller.txpoll_period = MBOX_POLLING_MS; + } + + mbox->dev = &pdev->dev; + + /* hardware supports only one channel. */ + mbox->controller.dev = mbox->dev; + mbox->controller.num_chans = 1; + mbox->controller.chans = &mbox->chan; + + if (mbox->irq > 0) + mbox->controller.ops = &xilinx_mbox_irq_ops; + else + mbox->controller.ops = &xilinx_mbox_poll_ops; + + ret = mbox_controller_register(&mbox->controller); + if (ret) { + dev_err(&pdev->dev, "Register mailbox failed\n"); + return ret; + } + + platform_set_drvdata(pdev, mbox); + + return 0; +} + +static int xilinx_mbox_remove(struct platform_device *pdev) +{ + struct xilinx_mbox *mbox = platform_get_drvdata(pdev); + + mbox_controller_unregister(&mbox->controller); + + return 0; +} + +static const struct of_device_id xilinx_mbox_match[] = { + { .compatible = "xlnx,mailbox-2.1" }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, xilinx_mbox_match); + +static struct platform_driver xilinx_mbox_driver = { + .probe = xilinx_mbox_probe, + .remove = xilinx_mbox_remove, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = xilinx_mbox_match, + }, +}; + +module_platform_driver(xilinx_mbox_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Xilinx mailbox specific functions"); +MODULE_AUTHOR("Moritz Fischer "); +MODULE_ALIAS("platform:xilinx-mailbox");