From patchwork Mon Jul 6 20:21:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6727581 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D1DA1C05AC for ; Mon, 6 Jul 2015 20:26:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B73462063C for ; Mon, 6 Jul 2015 20:26:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B54102063F for ; Mon, 6 Jul 2015 20:26:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCCum-0003hw-4S; Mon, 06 Jul 2015 20:22:56 +0000 Received: from mail-pa0-f44.google.com ([209.85.220.44]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCCuj-0003cE-VW for linux-arm-kernel@lists.infradead.org; Mon, 06 Jul 2015 20:22:54 +0000 Received: by pacws9 with SMTP id ws9so101915977pac.0 for ; Mon, 06 Jul 2015 13:22:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=MelUgWJhDe6yxisKBP+Qb1U071ruuO/vNDMpv4p+oOk=; b=heFq6D3FoJK79qU4V0S63rUZDA/V9KAUHToqLmYKxEradpOx71LXCiMtkOIAEd76U8 aBFCcdThf8pdqI14KEB/aDceSHQtY8UvvA6es+uHT3u32eVhOwIaw6N+2hvWcn2gLP4r dDnSdDGT1ehM7jwfH8Gh4ntqWrDPgVOaX+JIkgd/sOq4ByCmlnD9xbRHU0+96/m5ZvzM 5Wq01PGT7REOUfVEz0CgHAbk+dDoWfPeJyMZzTlZrbDLpzblcTGDSO0vN7Ag5q5xyGDy ck0xp5RdXjO6rNV3mcgIjxTuSSCyr8BjmBXKGplkxeC75fyOqd8pAt07R9HMWM5riN1V awkg== X-Gm-Message-State: ALoCoQnS3nqL0CsTo9ja0H/XZ//J/rBZ/AtQFVCThupy2sNcYVynlG9P69+OCv9Nx09cCcPccDJY X-Received: by 10.68.252.168 with SMTP id zt8mr1232284pbc.1.1436214152066; Mon, 06 Jul 2015 13:22:32 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id bs3sm19215804pbd.47.2015.07.06.13.22.30 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 06 Jul 2015 13:22:31 -0700 (PDT) From: Mathieu Poirier To: catalin.marinas@arm.com, will.deacon@arm.com Subject: [PATCH] arm64: Juno: Add support for coresight Date: Mon, 6 Jul 2015 14:21:45 -0600 Message-Id: <1436214105-3147-1-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150706_132254_046596_7D8B728C X-CRM114-Status: GOOD ( 13.16 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for coresight components. More specifically it has definitions for the A53/57 tracers, the A53/57 cluster funnels, the main funnel and the ETF configured in circular buffer mode. Support for other coresight IP blocks have not been addressed yet. Signed-off-by: Mathieu Poirier --- arch/arm64/boot/dts/arm/juno-base.dtsi | 241 +++++++++++++++++++++++++++++++++ 1 file changed, 241 insertions(+) diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index e3ee96036eca..b787f8a9304d 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -152,3 +152,244 @@ /include/ "juno-motherboard.dtsi" }; + + etf@20010000 { + compatible = "arm,coresight-tmc", "arm,primecell"; + reg = <0 0x20010000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + etf_in_port: endpoint { + slave-mode; + remote-endpoint = <&main_funnel_out_port>; + }; + }; + }; + + main_funnel@20040000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x20040000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + main_funnel_out_port: endpoint { + remote-endpoint = + <&etf_in_port>; + }; + }; + + /* + * input ports: + * port 0: Funnel Cortex-A57 + * port 1: Funnel Cortex-A53 + * port 2: STM + * port 3: Funnel SCP + * port 4: System profiler + * port 5: ATB extension interfaces + * port 6: ATB extension interfaces + */ + port@1 { + reg = <0>; + main_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = + <&A57_funnel_out_port>; + }; + }; + + port@2 { + reg = <1>; + main_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&A53_etm0_out_port>; + }; + }; + + }; + }; + + A57_funnel@220c0000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x220c0000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + A57_funnel_out_port: endpoint { + remote-endpoint = + <&main_funnel_in_port0>; + }; + }; + + /* input ports */ + port@1 { + reg = <0>; + A57_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&A57_etm0_out_port>; + }; + }; + + port@2 { + reg = <1>; + A57_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&A57_etm1_out_port>; + }; + }; + + /* input port 2 to 6 are not connected */ + }; + }; + + A53_funnel@220c0000 { + compatible = "arm,coresight-funnel", "arm,primecell"; + reg = <0 0x230c0000 0 0x1000>; + + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* output port */ + port@0 { + reg = <0>; + A53_funnel_out_port: endpoint { + remote-endpoint = + <&main_funnel_in_port1>; + }; + }; + + /* input port */ + port@1 { + reg = <0>; + A53_funnel_in_port0: endpoint { + slave-mode; + remote-endpoint = <&A53_etm0_out_port>; + }; + }; + + port@2 { + reg = <1>; + A53_funnel_in_port1: endpoint { + slave-mode; + remote-endpoint = <&A53_etm1_out_port>; + }; + }; + port@3 { + reg = <2>; + A53_funnel_in_port2: endpoint { + slave-mode; + remote-endpoint = <&A53_etm2_out_port>; + }; + }; + port@4 { + reg = <3>; + A53_funnel_in_port3: endpoint { + slave-mode; + remote-endpoint = <&A53_etm3_out_port>; + }; + }; + + /* input port 4 to 6 are not connected */ + }; + }; + + etm@22040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x22040000 0 0x1000>; + + cpu = <&A57_0>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A57_etm0_out_port: endpoint { + remote-endpoint = <&A57_funnel_in_port0>; + }; + }; + }; + + etm@22140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x22140000 0 0x1000>; + + cpu = <&A57_1>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A57_etm1_out_port: endpoint { + remote-endpoint = <&A57_funnel_in_port1>; + }; + }; + }; + + etm@23040000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23040000 0 0x1000>; + + cpu = <&A53_0>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A53_etm0_out_port: endpoint { + remote-endpoint = <&A53_funnel_in_port0>; + }; + }; + }; + + etm@23140000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23140000 0 0x1000>; + + cpu = <&A53_1>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A53_etm1_out_port: endpoint { + remote-endpoint = <&A53_funnel_in_port1>; + }; + }; + }; + + etm@23240000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23240000 0 0x1000>; + + cpu = <&A53_2>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A53_etm2_out_port: endpoint { + remote-endpoint = <&A53_funnel_in_port2>; + }; + }; + }; + + etm@23340000 { + compatible = "arm,coresight-etm4x", "arm,primecell"; + reg = <0 0x23340000 0 0x1000>; + + cpu = <&A53_3>; + clocks = <&soc_smc50mhz>; + clock-names = "apb_pclk"; + port { + A53_etm3_out_port: endpoint { + remote-endpoint = <&A53_funnel_in_port3>; + }; + }; + };