From patchwork Wed Jul 8 12:26:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 6746671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 60BFD9F380 for ; Wed, 8 Jul 2015 12:32:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6FE7320665 for ; Wed, 8 Jul 2015 12:32:31 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 74D2E20691 for ; Wed, 8 Jul 2015 12:32:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCoUg-0000w4-O1; Wed, 08 Jul 2015 12:30:30 +0000 Received: from mail-pd0-f179.google.com ([209.85.192.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZCoUO-0007m7-5P for linux-arm-kernel@lists.infradead.org; Wed, 08 Jul 2015 12:30:13 +0000 Received: by pdrg1 with SMTP id g1so13669389pdr.2 for ; Wed, 08 Jul 2015 05:29:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g3VOkA/CBQQVkACRBkeq3wcqbli6XATveBkVoJXdmho=; b=dyre3l2T7/OXA3/tpTNx/D7oHrbTPjWOaT+HgxtvB82c/mHYm7LAvzhiqpPrEprkbz isFByllAFzpO9/VwImpU2VFxGnQvOIqZHSya57DUJzvSAk4E8cR6Zmv0WyDsgZugGXyo DPD+QFDYOiu9/TvkYz2pVo9F9X75VDFRJcgnRqYfXZVhquq3dm7QBixyPk/7+uK3T+bl vC9LMmCtsWjI6R00mkajstz1E38YmGl7bQ4r13U3DF7DNSUeHZd4UIipye2/p/qgXHPC hjPbLntCEawG6ibG/AB3nCDRxvotf1g/JP1xWkkLFwY9cIO7Sqd8w4cUcx3Gm/D5UR2K lMpQ== X-Gm-Message-State: ALoCoQlwQyBRK2UJjDUwJQ94B4c4Yo0ylsqIeOq67JAyH48UKd5L9oOg0cq39VTbFTtTBFH1t3ON X-Received: by 10.68.250.194 with SMTP id ze2mr20352605pbc.24.1436358591572; Wed, 08 Jul 2015 05:29:51 -0700 (PDT) Received: from localhost.localdomain ([202.62.93.138]) by smtp.gmail.com with ESMTPSA id db1sm2415741pdb.50.2015.07.08.05.29.45 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Jul 2015 05:29:49 -0700 (PDT) From: Vaibhav Hiremath To: linux-arm-kernel@lists.infradead.org Subject: [PATCH-v6 5/6] mfd: 88pm800: Set default interrupt clear method Date: Wed, 8 Jul 2015 17:56:31 +0530 Message-Id: <1436358392-15449-6-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436358392-15449-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1436358392-15449-1-git-send-email-vaibhav.hiremath@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150708_053012_261447_4C70C760 X-CRM114-Status: GOOD ( 16.65 ) X-Spam-Score: 0.7 (/) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Zhao Ye , open list , Lee Jones , Vaibhav Hiremath , Samuel Ortiz MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RCVD_IN_SBL_CSS, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe (page 0) controls the method of clearing interrupt status of 88pm800 family of devices; 0: clear on read 1: clear on write If pdata is not coming from board file, then set the default irq clear method to "irq clear on write" Also, as suggested by "Lee Jones" renaming variable field to appropriate name and removed unnecessary field pm80x_chip.irq_mode, using platform_data.irq_clr_method. Signed-off-by: Zhao Ye Signed-off-by: Vaibhav Hiremath Reviewed-by: Krzysztof Kozlowski --- drivers/mfd/88pm800.c | 15 ++++++++++----- include/linux/mfd/88pm80x.h | 9 +++++++-- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c index 074ba8b..95c8ad4 100644 --- a/drivers/mfd/88pm800.c +++ b/drivers/mfd/88pm800.c @@ -347,8 +347,9 @@ static int device_regulator_init(struct pm80x_chip *chip) static int device_irq_init_800(struct pm80x_chip *chip) { struct regmap *map = chip->regmap; + struct pm80x_platform_data *pdata = dev_get_platdata(chip->dev); unsigned long flags = IRQF_ONESHOT; - int data, mask, ret = -EINVAL; + int irq_clr_mode, mask, ret = -EINVAL; if (!map || !chip->irq) { dev_err(chip->dev, "incorrect parameters\n"); @@ -356,15 +357,16 @@ static int device_irq_init_800(struct pm80x_chip *chip) } /* - * irq_mode defines the way of clearing interrupt. it's read-clear by - * default. + * irq_clr_on_wr defines the way of clearing interrupt by + * read/write(0/1). It's read-clear by default. */ mask = PM800_WAKEUP2_INV_INT | PM800_WAKEUP2_INT_CLEAR | PM800_WAKEUP2_INT_MASK; - data = PM800_WAKEUP2_INT_CLEAR; - ret = regmap_update_bits(map, PM800_WAKEUP2, mask, data); + irq_clr_mode = pdata->irq_clr_method == PM800_IRQ_CLR_ON_WRITE ? + PM800_WAKEUP2_INT_WRITE_CLEAR : PM800_WAKEUP2_INT_READ_CLEAR; + ret = regmap_update_bits(map, PM800_WAKEUP2, mask, irq_clr_mode); if (ret < 0) goto out; @@ -541,6 +543,9 @@ static int pm800_probe(struct i2c_client *client, /* Ensure we only alloc platform data once */ client->dev.platform_data = pdata; + + /* by default, set irq clear method on write */ + pdata->irq_clr_method = PM800_IRQ_CLR_ON_WRITE; } ret = pm80x_init(client); diff --git a/include/linux/mfd/88pm80x.h b/include/linux/mfd/88pm80x.h index 8fcad63..9c5773b 100644 --- a/include/linux/mfd/88pm80x.h +++ b/include/linux/mfd/88pm80x.h @@ -77,6 +77,8 @@ enum { #define PM800_WAKEUP2 (0x0E) #define PM800_WAKEUP2_INV_INT BIT(0) #define PM800_WAKEUP2_INT_CLEAR BIT(1) +#define PM800_WAKEUP2_INT_READ_CLEAR (0 << 1) +#define PM800_WAKEUP2_INT_WRITE_CLEAR (1 << 1) #define PM800_WAKEUP2_INT_MASK BIT(2) #define PM800_POWER_UP_LOG (0x10) @@ -300,11 +302,14 @@ struct pm80x_chip { struct regmap_irq_chip_data *irq_data; int type; int irq; - int irq_mode; unsigned long wu_flag; spinlock_t lock; }; +/* Used by irq_clr_method */ +#define PM800_IRQ_CLR_ON_READ 0 +#define PM800_IRQ_CLR_ON_WRITE 1 + struct pm80x_platform_data { struct pm80x_rtc_pdata *rtc; /* @@ -315,7 +320,7 @@ struct pm80x_platform_data { */ struct regulator_init_data *regulators[PM800_ID_RG_MAX]; unsigned int num_regulators; - int irq_mode; /* Clear interrupt by read/write(0/1) */ + bool irq_clr_method; /* Clear interrupt by read/write(0/1) */ int batt_det; /* enable/disable */ int (*plat_config)(struct pm80x_chip *chip, struct pm80x_platform_data *pdata);