From patchwork Fri Jul 24 15:37:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 6861191 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E8A2A9F380 for ; Fri, 24 Jul 2015 15:42:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2AC0F206FE for ; Fri, 24 Jul 2015 15:42:39 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 45A1D206F5 for ; Fri, 24 Jul 2015 15:42:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZIf5V-0002sV-En; Fri, 24 Jul 2015 15:40:41 +0000 Received: from eu-smtp-delivery-143.mimecast.com ([207.82.80.143]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZIf4g-0000mw-UV for linux-arm-kernel@lists.infradead.org; Fri, 24 Jul 2015 15:39:54 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-36-h2so-s9HRkKzcMrfYNcpCg-1; Fri, 24 Jul 2015 16:39:32 +0100 Received: from e103592.cambridge.arm.com ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Fri, 24 Jul 2015 16:39:31 +0100 From: Dave Martin To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 5/9] arm64/debug: Move BRK ESR template macro into Date: Fri, 24 Jul 2015 16:37:45 +0100 Message-Id: <1437752284-14847-6-git-send-email-Dave.Martin@arm.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1437752284-14847-1-git-send-email-Dave.Martin@arm.com> References: <1437752284-14847-1-git-send-email-Dave.Martin@arm.com> X-OriginalArrivalTime: 24 Jul 2015 15:39:32.0011 (UTC) FILETIME=[EF54BFB0:01D0C626] X-MC-Unique: h2so-s9HRkKzcMrfYNcpCg-1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150724_083951_860778_1F33128E X-CRM114-Status: UNSURE ( 7.84 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.2 (----) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Lorenzo Pieralisi , Will Deacon MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It makes sense to keep all the architectural exception syndrome definitions in the same place. Signed-off-by: Dave Martin Acked-by: Mark Rutland Acked-by: Catalin Marinas --- arch/arm64/include/asm/debug-monitors.h | 7 ------- arch/arm64/include/asm/esr.h | 7 +++++++ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h index bb97e9d..e28b1dd 100644 --- a/arch/arm64/include/asm/debug-monitors.h +++ b/arch/arm64/include/asm/debug-monitors.h @@ -44,13 +44,6 @@ #define BREAK_INSTR_SIZE AARCH64_INSN_SIZE /* - * ESR values expected for dynamic and compile time BRK instruction - */ -#define ESR_ELx_VAL_BRK64(imm) \ - ((ESR_ELx_EC_BRK64 << ESR_ELx_EC_SHIFT) | ESR_ELx_IL | \ - ((imm) & 0xffff)) - -/* * #imm16 values used for BRK instruction generation * Allowed values for kgbd are 0x400 - 0x7ff * 0x100: for triggering a fault on purpose (reserved) diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 7052245..1b44cf6 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -99,6 +99,13 @@ #define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) #define ESR_ELx_xVC_IMM_MASK ((1UL << 16) - 1) +/* ESR value templates for specific events */ + +/* BRK instruction trap from AArch64 state */ +#define ESR_ELx_VAL_BRK64(imm) \ + ((ESR_ELx_EC_BRK64 << ESR_ELx_EC_SHIFT) | ESR_ELx_IL | \ + ((imm) & 0xffff)) + #ifndef __ASSEMBLY__ #include