From patchwork Fri Jul 31 15:37:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 6914331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 406B19F39D for ; Fri, 31 Jul 2015 15:41:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C1067203F1 for ; Fri, 31 Jul 2015 15:41:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 397EB203F7 for ; Fri, 31 Jul 2015 15:41:38 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZLCPC-0000qy-1U; Fri, 31 Jul 2015 15:39:30 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZLCO2-0000Dk-83 for linux-arm-kernel@lists.infradead.org; Fri, 31 Jul 2015 15:38:19 +0000 Received: by pdrg1 with SMTP id g1so44553241pdr.2 for ; Fri, 31 Jul 2015 08:37:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=CVqfGZ8TvE8eB/evYiyZhPesjVYLStemfImd4/Ppmus=; b=jHtnKFOluqmVgXUj8kFjyt2TMB2szE+2aKaTr+5PkpBR1eAlA4lHXiTtVdIqWxY0f0 Lj8Zt7ZcJLQw/+J1sWsLh9f6vCpHJchK/1aB/nXfmXoppgCPD75kBA2P6AcxOU5LhNAp CJE03uig2Y4A7k3rRNMe6jexFX0r2kYn2Un1tcKJFWFHCUEyY0a91WGJJBNuXKD3EQC5 ozoJBjHxGsf+8bqd1UbuNiXd1HE20irfyzoO+SwJfytybpREEmZAxpGxK27t5U37mBPV Wj16EIuNxdYvbyZ9FUFh2noL+dUB/FJuUfCqd2/vPrPOYm5vwYruMvip7VW4cPjGWrOs 6cig== X-Gm-Message-State: ALoCoQnEwo06YQUFCfkoGPHPGyeSCYpGWaiKn/MuRE5qbDiG9XR0Os5QIztNeJriOFhD88rI7THQ X-Received: by 10.70.42.202 with SMTP id q10mr8048431pdl.41.1438357079091; Fri, 31 Jul 2015 08:37:59 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id y2sm8317284pdi.80.2015.07.31.08.37.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Jul 2015 08:37:58 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Subject: [PATCH 07/10] coresight-etm3x: Support context-ID tracing when PID namespace is enabled Date: Fri, 31 Jul 2015 09:37:27 -0600 Message-Id: <1438357050-22486-8-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438357050-22486-1-git-send-email-mathieu.poirier@linaro.org> References: <1438357050-22486-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150731_083818_448874_06DFA458 X-CRM114-Status: GOOD ( 15.72 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mathieu.poirier@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Chunyan Zhang The Coresight ETM drivers already support context-ID tracing, but it won't work when PID namespace is enabled. This is because when using PID namespace a process id (ie. VPID) seen from the current namespace differs from the id (ie. PID) seen by kernel. So when users write the process id seen by themselves to ETM, there needs to be a translation from VPID to PID, as such ETM drivers will write the PID into the Context ID register correctly. Signed-off-by: Chunyan Zhang Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm.h | 3 +++ drivers/hwtracing/coresight/coresight-etm3x.c | 16 +++++++++++----- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h index 52af5f0adbed..b4481eb29304 100644 --- a/drivers/hwtracing/coresight/coresight-etm.h +++ b/drivers/hwtracing/coresight/coresight-etm.h @@ -184,6 +184,8 @@ * @seq_curr_state: current value of the sequencer register. * @ctxid_idx: index for the context ID registers. * @ctxid_pid: value for the context ID to trigger on. + * @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise + * the same value of ctxid_pid. * @ctxid_mask: mask applicable to all the context IDs. * @sync_freq: Synchronisation frequency. * @timestamp_event: Defines an event that requests the insertion @@ -236,6 +238,7 @@ struct etm_drvdata { u32 seq_curr_state; u8 ctxid_idx; u32 ctxid_pid[ETM_MAX_CTXID_CMP]; + u32 ctxid_vpid[ETM_MAX_CTXID_CMP]; u32 ctxid_mask; u32 sync_freq; u32 timestamp_event; diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 361b82068dda..bf2476ed9356 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -237,8 +237,11 @@ static void etm_set_default(struct etm_drvdata *drvdata) drvdata->seq_curr_state = 0x0; drvdata->ctxid_idx = 0x0; - for (i = 0; i < drvdata->nr_ctxid_cmp; i++) + for (i = 0; i < drvdata->nr_ctxid_cmp; i++) { drvdata->ctxid_pid[i] = 0x0; + drvdata->ctxid_vpid[i] = 0x0; + } + drvdata->ctxid_mask = 0x0; } @@ -1393,7 +1396,7 @@ static ssize_t ctxid_pid_show(struct device *dev, struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); spin_lock(&drvdata->spinlock); - val = drvdata->ctxid_pid[drvdata->ctxid_idx]; + val = drvdata->ctxid_vpid[drvdata->ctxid_idx]; spin_unlock(&drvdata->spinlock); return sprintf(buf, "%#lx\n", val); @@ -1404,15 +1407,18 @@ static ssize_t ctxid_pid_store(struct device *dev, const char *buf, size_t size) { int ret; - unsigned long val; + unsigned long vpid, pid; struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent); - ret = kstrtoul(buf, 16, &val); + ret = kstrtoul(buf, 16, &vpid); if (ret) return ret; + pid = coresight_vpid_to_pid(vpid); + spin_lock(&drvdata->spinlock); - drvdata->ctxid_pid[drvdata->ctxid_idx] = val; + drvdata->ctxid_pid[drvdata->ctxid_idx] = pid; + drvdata->ctxid_vpid[drvdata->ctxid_idx] = vpid; spin_unlock(&drvdata->spinlock); return size;