From patchwork Thu Aug 13 14:47:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Richter X-Patchwork-Id: 7008841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 800399F344 for ; Thu, 13 Aug 2015 14:51:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 841962079F for ; Thu, 13 Aug 2015 14:51:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 15C0F207A9 for ; Thu, 13 Aug 2015 14:51:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZPtoS-00038K-Nh; Thu, 13 Aug 2015 14:49:00 +0000 Received: from mail-wi0-x22c.google.com ([2a00:1450:400c:c05::22c]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZPto5-0002kR-8J for linux-arm-kernel@lists.infradead.org; Thu, 13 Aug 2015 14:48:38 +0000 Received: by wijp15 with SMTP id p15so261965364wij.0 for ; Thu, 13 Aug 2015 07:48:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=qEaDm65JpADxdWPi8VQKHgjQMF/pgv9GAXlMtKVTeXk=; b=EVM+qqD1KhlHnKHdppOaFvRb0s09k1JumqxHa5ECg/7F44lQI2NqTM+wTy6XPV4gpC 8AUtwDAD+ARPZBr8XH4iacGOGnkode2/HIh5D1BgMwou1ip2JgvAzhWhi2UkUWBOigTr VRurCr3dKVyrRlDjcjxZrLgnSgIaUC4PNwF0D71vvredADCzMSLDjUrISh1KroDBzwyx D2UOzM3rW9CO7Leiaknds3Vrg1aMN37YYZU3H/4/mR1Xv5gGqgg/lNmMOjoPYtzEExvV ilEKQYSVGoH0ig48PChZ9sPV2PGAimCozK5+TFXxEJl9os7oV2FxIB6paX1ygBp66b1e XgoQ== X-Received: by 10.194.63.42 with SMTP id d10mr87134659wjs.92.1439477295716; Thu, 13 Aug 2015 07:48:15 -0700 (PDT) Received: from rric.localdomain (x5ce0c270.dyn.telefonica.de. [92.224.194.112]) by smtp.gmail.com with ESMTPSA id g13sm3735405wjs.21.2015.08.13.07.48.14 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 13 Aug 2015 07:48:14 -0700 (PDT) From: Robert Richter To: Marc Zygnier , Thomas Gleixner , Jason Cooper Subject: [PATCH v2 4/5] irqchip, gicv3-its: Read typer register outside the loop Date: Thu, 13 Aug 2015 16:47:56 +0200 Message-Id: <1439477277-6157-5-git-send-email-rric@kernel.org> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1439477277-6157-1-git-send-email-rric@kernel.org> References: <1439477277-6157-1-git-send-email-rric@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150813_074837_530485_7497090E X-CRM114-Status: GOOD ( 14.87 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Richter , Tirumalesh Chalamarla , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Robert Richter No need to read the typer register in the loop. Values do not change. This patch is basically a prerequisite for a follow-on patch that adds errata code for Cavium ThunderX. It moves the calculation of the number of id entries to the beginning of the function close to other setup values that are needed to allocate the its table. Now we have a central location to modify the setup parameters and the errata code can be implemented in a single block. Acked-by: Marc Zyngier Signed-off-by: Robert Richter --- drivers/irqchip/irq-gic-v3-its.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 105674037618..bf0659821683 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -804,6 +804,8 @@ static int its_alloc_tables(struct its_node *its) int psz = SZ_64K; u64 shr = GITS_BASER_InnerShareable; u64 cache = GITS_BASER_WaWb; + u64 typer = readq_relaxed(its->base + GITS_TYPER); + u32 ids = GITS_TYPER_DEVBITS(typer); for (i = 0; i < GITS_BASER_NR_REGS; i++) { u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); @@ -827,9 +829,6 @@ static int its_alloc_tables(struct its_node *its) * For other tables, only allocate a single page. */ if (type == GITS_BASER_TYPE_DEVICE) { - u64 typer = readq_relaxed(its->base + GITS_TYPER); - u32 ids = GITS_TYPER_DEVBITS(typer); - /* * 'order' was initialized earlier to the default page * granule of the the ITS. We can't have an allocation