From patchwork Fri Aug 14 14:20:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 7015461 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DE57B9F373 for ; Fri, 14 Aug 2015 14:34:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ED0C2207FB for ; Fri, 14 Aug 2015 14:34:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D6B9D207D2 for ; Fri, 14 Aug 2015 14:34:13 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZQG22-0002mE-PI; Fri, 14 Aug 2015 14:32:30 +0000 Received: from casper.infradead.org ([2001:770:15f::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZQG20-0002l2-K3 for linux-arm-kernel@bombadil.infradead.org; Fri, 14 Aug 2015 14:32:28 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZQFrH-0001zy-8q for linux-arm-kernel@lists.infradead.org; Fri, 14 Aug 2015 14:21:24 +0000 Received: from weser.hi.pengutronix.de ([2001:67c:670:100:fa0f:41ff:fe58:4010]) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZQFqt-00077c-6F; Fri, 14 Aug 2015 16:20:59 +0200 Message-ID: <1439562059.13210.61.camel@pengutronix.de> Subject: Re: [PATCH] ARM: keystone: add a work around to handle asynchronous external abort From: Lucas Stach To: Russell King - ARM Linux Date: Fri, 14 Aug 2015 16:20:59 +0200 In-Reply-To: <20150814140934.GX7557@n2100.arm.linux.org.uk> References: <1439320409-20084-1-git-send-email-m-karicheri2@ti.com> <55CDF579.4050408@ti.com> <20150814140934.GX7557@n2100.arm.linux.org.uk> X-Mailer: Evolution 3.12.9-1+b1 Mime-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:fa0f:41ff:fe58:4010 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150814_152123_395449_AEFC7F46 X-CRM114-Status: GOOD ( 25.44 ) X-Spam-Score: -2.9 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Murali Karicheri , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ssantosh@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Russell, Am Freitag, den 14.08.2015, 15:09 +0100 schrieb Russell King - ARM Linux: [...] > > What causes the abort? We shouldn't be adding hacks like this to the > kernel without having the full picture... > some of the issues with tracking down such imprecise external aborts are due to the fact that we only enable the signaling of those aborts on entering the user-space. So the first schedule() crashes on the previous dangling abort. I'm carrying this patch locally to enable imprecise aborts much earlier in the boot process. I think it has already been on the list some times, but apparently it has fallen through the cracks. If you agree that this is the right thing to do I can do a proper repost. Regards, Lucas ---------------------->8--------------------------------------------- From bb9117d94cc2f1061dc364f42c446ccd9191e869 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 19 Feb 2015 18:12:50 +0100 Subject: [PATCH] ARM: Add imprecise abort enable/disable macro This patch adds imprecise abort enable/disable macros. It also enables imprecise aborts when starting kernel. Changes in v2: Only ARMv6 and later have CPSR.A bit. On earlier CPUs, and ARMv7M this should be a no-op. Signed-off-by: Fabrice Gasnier Signed-off-by: Lucas Stach --- lst: rebased on v3.19 --- arch/arm/include/asm/irqflags.h | 10 ++++++++++ arch/arm/kernel/smp.c | 1 + arch/arm/kernel/traps.c | 4 ++++ 3 files changed, 15 insertions(+) dedicated diff --git a/arch/arm/include/asm/irqflags.h b/arch/arm/include/asm/irqflags.h index 3b763d6652a0..8301f875564e 100644 --- a/arch/arm/include/asm/irqflags.h +++ b/arch/arm/include/asm/irqflags.h @@ -51,6 +51,14 @@ static inline void arch_local_irq_disable(void) #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc") #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc") + +#ifndef CONFIG_CPU_V7M +#define local_abt_enable() __asm__("cpsie a @ __sta" : : : "memory", "cc") +#define local_abt_disable() __asm__("cpsid a @ __cla" : : : "memory", "cc") +#else +#define local_abt_enable() do { } while (0) +#define local_abt_disable() do { } while (0) +#endif #else /* @@ -130,6 +138,8 @@ static inline void arch_local_irq_disable(void) : "memory", "cc"); \ }) +#define local_abt_enable() do { } while (0) +#define local_abt_disable() do { } while (0) #endif /* diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 86ef244c5a24..7b6b93cabef4 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -378,6 +378,7 @@ asmlinkage void secondary_start_kernel(void) local_irq_enable(); local_fiq_enable(); + local_abt_enable(); /* * OK, it's off to the idle thread for us diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 788e23fe64d8..466726ba9bdb 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -881,6 +881,10 @@ void __init early_trap_init(void *vectors_base) flush_icache_range(vectors, vectors + PAGE_SIZE * 2); modify_domain(DOMAIN_USER, DOMAIN_CLIENT); + + /* Enable imprecise aborts */ + local_abt_enable(); + #else /* ifndef CONFIG_CPU_V7M */ /* * on V7-M there is no need to copy the vector table to a