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BY2PR0301MB1639; 5:MMReiyaNOqWcC/xnS9LgZ8Nw7c3IKNkpE3meM84MvXix2HLKxcJ555R2CwaKGamoxhC46MXnd09nv3ADP3sfIF0J7z7pG5rgDPwjBaSrPNba2W/GvIhOQV492XU8UjChC4Zbq3J9d8dHqtq+1U7DMA==; 24:FkWWEtG92oPruY7UPUwc6Hj+RJAOh/Y1Nu7Hll7dgC4+hSsGDnkSC6Onp8VAVB3r4rQTMYj/O6nqXzwCmP9cqaRau0O4UFWJ16POY+nWON8=; 20:BPAqWktdKIAmhe8w7OKkReCmRx4wvGXHWq0stJgVpMC0CalCvWcTG5SMHUDjLQwcPJeolxKcf4HWRgU6KuDcpg== X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2015 15:50:44.2857 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2]; Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR0301MB1639 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150818_085107_134600_403C54BE X-CRM114-Status: GOOD ( 13.02 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Frank.Li@freescale.com, nitin.garg@freescale.com, Anson.Huang@freescale.com, linux-gpio@vger.kernel.org, robh+dt@kernel.org, yibin.gong@freescale.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAD_ENC_HEADER,BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP iMX7D has two iomuxc controllers, iomuxc controller similar as previous iMX SoC generation and iomuxc-lpsr which provides low power state rentetion capabilities on gpios that are part of iomuxc-lpsr - Add iomuxc-lpsr gpio group id's - Use flag ZERO_OFFSET_VALID and SHARE_INPUT_SELECT_REG to properly set pads from iomuxc-lpsr domain Signed-off-by: Adrian Alonso --- drivers/pinctrl/freescale/pinctrl-imx7d.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pinctrl/freescale/pinctrl-imx7d.c b/drivers/pinctrl/freescale/pinctrl-imx7d.c index 1fa7530..a347c22 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx7d.c +++ b/drivers/pinctrl/freescale/pinctrl-imx7d.c @@ -172,6 +172,14 @@ enum imx7d_pads { MX7D_PAD_ENET1_RX_CLK = 152, MX7D_PAD_ENET1_CRS = 153, MX7D_PAD_ENET1_COL = 154, + MX7D_PAD_GPIO1_IO00 = 0, + MX7D_PAD_GPIO1_IO01 = 1, + MX7D_PAD_GPIO1_IO02 = 2, + MX7D_PAD_GPIO1_IO03 = 3, + MX7D_PAD_GPIO1_IO04 = 4, + MX7D_PAD_GPIO1_IO05 = 5, + MX7D_PAD_GPIO1_IO06 = 6, + MX7D_PAD_GPIO1_IO07 = 7, }; /* Pad names for the pinmux subsystem */ @@ -333,13 +341,32 @@ static const struct pinctrl_pin_desc imx7d_pinctrl_pads[] = { IMX_PINCTRL_PIN(MX7D_PAD_ENET1_COL), }; +/* Pad names for the pinmux subsystem */ +static const struct pinctrl_pin_desc imx7d_lpsr_pinctrl_pads[] = { + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO00), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO01), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO02), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO03), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO04), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO05), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO06), + IMX_PINCTRL_PIN(MX7D_PAD_GPIO1_IO07), +}; + static struct imx_pinctrl_soc_info imx7d_pinctrl_info = { .pins = imx7d_pinctrl_pads, .npins = ARRAY_SIZE(imx7d_pinctrl_pads), }; +static struct imx_pinctrl_soc_info imx7d_lpsr_pinctrl_info = { + .pins = imx7d_lpsr_pinctrl_pads, + .npins = ARRAY_SIZE(imx7d_lpsr_pinctrl_pads), + .flags = SHARE_INPUT_SELECT_REG | ZERO_OFFSET_VALID, +}; + static struct of_device_id imx7d_pinctrl_of_match[] = { { .compatible = "fsl,imx7d-iomuxc", .data = &imx7d_pinctrl_info, }, + { .compatible = "fsl,imx7d-iomuxc-lpsr", .data = &imx7d_lpsr_pinctrl_info }, { /* sentinel */ } };