From patchwork Thu Aug 27 16:39:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 7086071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 065009F358 for ; Thu, 27 Aug 2015 16:43:22 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1AC4C2094F for ; Thu, 27 Aug 2015 16:43:20 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3F78C2096B for ; Thu, 27 Aug 2015 16:43:19 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZV0E1-0003gA-N9; Thu, 27 Aug 2015 16:40:29 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZV0DL-000256-En for linux-arm-kernel@lists.infradead.org; Thu, 27 Aug 2015 16:39:48 +0000 Received: from dude.hi.4.pengutronix.de ([10.1.0.7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1ZV0Cx-00033b-E7; Thu, 27 Aug 2015 18:39:23 +0200 From: Lucas Stach To: Shawn Guo Subject: [PATCH 7/8] clk: imx6: retain early UART clocks during kernel init Date: Thu, 27 Aug 2015 18:39:20 +0200 Message-Id: <1440693561-28095-8-git-send-email-l.stach@pengutronix.de> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1440693561-28095-1-git-send-email-l.stach@pengutronix.de> References: <1440693561-28095-1-git-send-email-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 10.1.0.7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150827_093947_712553_17093589 X-CRM114-Status: GOOD ( 10.51 ) X-Spam-Score: -3.3 (---) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Turquette , Stephen Boyd , patchwork-lst@pengutronix.de, kernel@pengutronix.de, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach --- drivers/clk/imx/clk-imx6q.c | 12 ++++++++++++ drivers/clk/imx/clk-imx6sl.c | 12 ++++++++++++ drivers/clk/imx/clk-imx6sx.c | 12 ++++++++++++ 3 files changed, 36 insertions(+) diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index d046f8e43de8..af6a6517b26c 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -130,6 +130,12 @@ static inline int clk_on_imx6dl(void) return of_machine_is_compatible("fsl,imx6dl"); } +static void __init imx6q_uart_disable_cb(void) +{ + clk_disable_unprepare(clk[IMX6QDL_CLK_UART_IPG]); + clk_disable_unprepare(clk[IMX6QDL_CLK_UART_SERIAL]); +} + static void __init imx6q_clocks_init(struct device_node *ccm_node) { struct device_node *np; @@ -534,5 +540,11 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) /* All existing boards with PCIe use LVDS1 */ if (IS_ENABLED(CONFIG_PCI_IMX6)) clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]); + + if (imx_clk_keep_uart()) { + clk_prepare_enable(clk[IMX6QDL_CLK_UART_IPG]); + clk_prepare_enable(clk[IMX6QDL_CLK_UART_SERIAL]); + imx_clk_set_uart_disable_callback(imx6q_uart_disable_cb); + } } CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init); diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index a0d4cf26cfa9..737a9a84f201 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -184,6 +184,12 @@ void imx6sl_set_wait_clk(bool enter) imx6sl_enable_pll_arm(false); } +static void __init imx6sl_uart_disable_cb(void) +{ + clk_disable_unprepare(clks[IMX6SL_CLK_UART]); + clk_disable_unprepare(clks[IMX6SL_CLK_UART_SERIAL]); +} + static void __init imx6sl_clocks_init(struct device_node *ccm_node) { struct device_node *np; @@ -439,5 +445,11 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL], clks[IMX6SL_CLK_PLL2_PFD2]); + + if (imx_clk_keep_uart()) { + clk_prepare_enable(clks[IMX6SL_CLK_UART]); + clk_prepare_enable(clks[IMX6SL_CLK_UART_SERIAL]); + imx_clk_set_uart_disable_callback(imx6sl_uart_disable_cb); + } } CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init); diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c index 5b95c2c2bf52..ec14235659cc 100644 --- a/drivers/clk/imx/clk-imx6sx.c +++ b/drivers/clk/imx/clk-imx6sx.c @@ -135,6 +135,12 @@ static u32 share_count_ssi1; static u32 share_count_ssi2; static u32 share_count_ssi3; +static void __init imx6sx_uart_disable_cb(void) +{ + clk_disable_unprepare(clks[IMX6SX_CLK_UART_IPG]); + clk_disable_unprepare(clks[IMX6SX_CLK_UART_SERIAL]); +} + static void __init imx6sx_clocks_init(struct device_node *ccm_node) { struct device_node *np; @@ -557,5 +563,11 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]); clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]); + + if (imx_clk_keep_uart()) { + clk_prepare_enable(clks[IMX6SX_CLK_UART_IPG]); + clk_prepare_enable(clks[IMX6SX_CLK_UART_SERIAL]); + imx_clk_set_uart_disable_callback(imx6sx_uart_disable_cb); + } } CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);