From patchwork Thu Sep 17 08:36:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bayi Cheng X-Patchwork-Id: 7203491 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 982E79F32B for ; Thu, 17 Sep 2015 08:40:01 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B3FA720803 for ; Thu, 17 Sep 2015 08:40:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E442220804 for ; Thu, 17 Sep 2015 08:39:59 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZcUgz-0000Wq-Df; Thu, 17 Sep 2015 08:37:21 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZcUgt-0000Pq-64; Thu, 17 Sep 2015 08:37:16 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1261851583; Thu, 17 Sep 2015 16:36:45 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Thu, 17 Sep 2015 16:36:43 +0800 From: Bayi Cheng To: David Woodhouse , Brian Norris Subject: [PATCH 1/3] doc: dt: add documentation for Mediatek spi-nor controller Date: Thu, 17 Sep 2015 16:36:32 +0800 Message-ID: <1442478994-12467-1-git-send-email-bayi.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150917_013715_530245_CF5B09C0 X-CRM114-Status: GOOD ( 17.14 ) X-Spam-Score: -1.1 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Pawel Moll , Ian Campbell , Sascha Hauer , linux-kernel@vger.kernel.org, Daniel Kurtz , Rob Herring , linux-mediatek@lists.infradead.org, Bayi Cheng , Kumar Gala , Matthias Brugger , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device tree binding documentation for serial flash with Mediatek serial flash controller Change-Id: Iaecd0bb7ba1b224f1e27bd7063f0b8d7ea30175a Signed-off-by: Bayi Cheng --- Documentation/devicetree/bindings/mtd/mtk_quadspi.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/mtk_quadspi.txt diff --git a/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt new file mode 100644 index 0000000..6153227 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/mtk_quadspi.txt @@ -0,0 +1,18 @@ +* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller + +Required properties: +- compatible: Should be "mediatek,mt8173-nor"; +- reg: Physical base address and length of the controller's register +- clocks: spi source clock amd serial flash controller's clock +- clock-names: "spi", "sf" + See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. + +Example: +nor_flash: nor@1100d000 { + compatible = "mediatek,mt8173-nor"; + reg = <0 0x1100D000 0 0xE0>; + clocks = <&pericfg CLK_PERI_SPI>, + <&topckgen CLK_TOP_SPINFI_IFR_SEL>; + clock-names = "spi", "sf"; +}; +