From patchwork Fri Sep 18 16:26:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7219021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 930C69F372 for ; Fri, 18 Sep 2015 16:31:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A6E8920636 for ; Fri, 18 Sep 2015 16:31:10 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B2E48205AA for ; Fri, 18 Sep 2015 16:31:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZcyXP-00040r-TQ; Fri, 18 Sep 2015 16:29:27 +0000 Received: from mail-pa0-f44.google.com ([209.85.220.44]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZcyVm-0001aP-H9 for linux-arm-kernel@lists.infradead.org; Fri, 18 Sep 2015 16:27:49 +0000 Received: by pacfv12 with SMTP id fv12so56044396pac.2 for ; Fri, 18 Sep 2015 09:27:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rrNPblrdA7yCN2KyJuEh1dPfMbuGgCAwV54d8yMFfPo=; b=ahXLenmOgQG5ahqFetbtwRsm9QaL+wg8AoI+DdydPHhyMtCDvG3W507YpiCviS6O9W F0K8Pznt26x0uvvMvDI12uGex4DjypAcP1l+uO9u7nw1YhraJcVOoNz0q+eOjRCSRydQ LdRQD5mcKn86jKFcmpZoqnH44VE+fuVki1ZNqQGhYHEqDUR+QPJZ9rMrokG60QqRWrY9 SEy4X1yLw/eTwI+JDB8SiRxUjjuPBau1wskAdogRuKkbmmS9S+TsqgchPiPQcNeIfoDp BOHgTgiC0Qu0n73UT1FEIeOUEoXt+myZaiEHLH9sb8xXv4EeR08nVlHggOzRpU8BKyb4 pCMw== X-Gm-Message-State: ALoCoQmIhT29W5E+z4MgOdvk1Dp+R+19I3YH+aT3KpPUOKM02ZnnB2dmbalE8GNMvHQTCPuilidq X-Received: by 10.68.125.197 with SMTP id ms5mr8338149pbb.38.1442593645682; Fri, 18 Sep 2015 09:27:25 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id la4sm9847027pbc.76.2015.09.18.09.27.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Sep 2015 09:27:25 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net Subject: [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Date: Fri, 18 Sep 2015 10:26:31 -0600 Message-Id: <1442593594-10665-18-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> References: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150918_092746_963412_41DB2739 X-CRM114-Status: GOOD ( 18.87 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, pawel.moll@arm.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, adrian.hunter@intel.com, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Other than probing each device entry under /sys/bus/coresight/devices/, there is no way for user space to know which CPU is associated to which tracer. But knowing those association is important to discover tracer specifics and configuration options. As such introducing a symbolic link under /sys/bus/event_source/devices/cs_etm/cpuX that reference the coresight device a CPU is associated with. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 22 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm-perf.h | 27 ++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm3x.c | 6 ++++++ 3 files changed, 55 insertions(+) create mode 100644 drivers/hwtracing/coresight/coresight-etm-perf.h diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index edacf4b1d0bc..de0198e72603 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -341,6 +341,28 @@ static int etm_event_add(struct perf_event *event, int mode) return 0; } +int etm_perf_symlink(struct coresight_device *csdev, bool link) +{ + char entry[sizeof("cpu9999999")]; + int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev); + struct device *pmu_dev = etm_pmu.dev; + struct device *cs_dev = &csdev->dev; + + sprintf(entry, "cpu%d", cpu); + + if (link) { + ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry); + if (ret) + return ret; + per_cpu(csdev_src, cpu) = csdev; + } else { + sysfs_remove_link(&pmu_dev->kobj, entry); + per_cpu(csdev_src, cpu) = NULL; + } + + return 0; +} + static int __init etm_perf_init(void) { etm_pmu.capabilities = PERF_PMU_CAP_EXCLUSIVE; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h new file mode 100644 index 000000000000..4dd900f2362a --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -0,0 +1,27 @@ +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CORESIGHT_ETM_PERF_H +#define _CORESIGHT_ETM_PERF_H + +struct coresight_device; + +#ifdef CONFIG_CORESIGHT +int etm_perf_symlink(struct coresight_device *csdev, bool link); + +#else +static inline int etm_perf_symlink(struct coresight_device *csdev, bool link) +{ return -EINVAL; } + +#endif /* CONFIG_CORESIGHT */ + +#endif diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index a4c158df0fef..6a44ea330a4a 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -34,6 +34,7 @@ #include #include "coresight-etm.h" +#include "coresight-etm-perf.h" static int boot_enable; module_param_named(boot_enable, boot_enable, int, S_IRUGO); @@ -1995,6 +1996,11 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) goto err_arch_supported; } + if (etm_perf_symlink(drvdata->csdev, true)) { + ret = -EPROBE_DEFER; + goto err_arch_supported; + } + pm_runtime_put(&adev->dev); dev_info(dev, "%s initialized\n", (char *)id->data);