From patchwork Mon Sep 21 04:16:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7227681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A66C09F380 for ; Mon, 21 Sep 2015 04:22:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6D1852085B for ; Mon, 21 Sep 2015 04:22:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24E1E20877 for ; Mon, 21 Sep 2015 04:22:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZdsXQ-0007J9-S4; Mon, 21 Sep 2015 04:17:12 +0000 Received: from mail-pa0-f68.google.com ([209.85.220.68]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZdsXL-0007DC-Rh; Mon, 21 Sep 2015 04:17:09 +0000 Received: by padew5 with SMTP id ew5so12684964pad.0; Sun, 20 Sep 2015 21:16:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IQPh6HkiaNIMkgr/p2UIfV2p752Csm1owB+F1pl+YN8=; b=F81rKKmwQJ62/UqUybCg6Q3ybcKGckBMI/zT6NQ0V75xkdSDZ6ppLb+vl+TYM0RDCt uPEL7/uTVs/040N0bxXCvnXY0Xa3dBKS0YM+vKO3GkA7yeWzcNSbJazOus0vdOMpZJYZ 0qMZrY00DxIuiOZCWcpjvkno7XBn0rigjXCSh0SNG2EnlAwHQIdhLvLn29jE2309C58g B1UbDrC00VV3iKbfMbyJWTVwSEx+sv6/lcRoJPqRcnvNE/rYDxL+NUNTHJRcTI/vr6yp pSzUwGJpJWFXYVCq52JlWNdxN2cJrAwsvKKOJfqwujW+VKjBxwViXzGk9wL2KpLJcXsY /khA== X-Received: by 10.66.144.135 with SMTP id sm7mr22497757pab.106.1442809007223; Sun, 20 Sep 2015 21:16:47 -0700 (PDT) Received: from localhost.localdomain ([103.47.144.190]) by smtp.gmail.com with ESMTPSA id pm8sm11519551pbc.9.2015.09.20.21.16.38 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 20 Sep 2015 21:16:46 -0700 (PDT) From: Caesar Wang To: heiko@sntech.de, edubezval@gmail.com, rui.zhang@intel.com Subject: [PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver Date: Mon, 21 Sep 2015 12:16:08 +0800 Message-Id: <1442808971-2619-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442808971-2619-1-git-send-email-wxt@rock-chips.com> References: <1442808971-2619-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150920_211708_054087_9C1AEAAD X-CRM114-Status: GOOD ( 21.77 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, ijc+devicetree@hellion.org.uk, inux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, catalin.marinas@arm.com, dmitry.torokhov@gmail.com, will.deacon@arm.com, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, galak@codeaurora.org, olof@lixom.net, linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria of each channel can be configurable. The system has two Temperature Sensors, channel 0 is for CPU, and channel 1 is for GPU. Signed-off-by: Caesar Wang --- drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++----- 1 file changed, 176 insertions(+), 25 deletions(-) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 4d5b7d4..16d2476 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -1,6 +1,9 @@ /* * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd * + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd + * Caesar Wang + * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. @@ -43,16 +46,11 @@ enum tshut_polarity { TSHUT_HIGH_ACTIVE, }; -/** - * The system has three Temperature Sensors. channel 0 is reserved, - * channel 1 is for CPU, and channel 2 is for GPU. - */ -enum sensor_id { - SENSOR_CPU = 1, - SENSOR_GPU, -}; - struct rockchip_tsadc_chip { + /* The sensor id of chip correspond to the ADC channel */ + int cpu_id; + int gpu_id; + /* The hardware-controlled tshut property */ long tshut_temp; enum tshut_mode tshut_mode; @@ -72,10 +70,11 @@ struct rockchip_tsadc_chip { struct rockchip_thermal_sensor { struct rockchip_thermal_data *thermal; struct thermal_zone_device *tzd; - enum sensor_id id; + int id; }; -#define NUM_SENSORS 2 /* Ignore unused sensor 0 */ +/* Two sensors: CPU and GPU */ +#define NUM_SENSORS 2 struct rockchip_thermal_data { const struct rockchip_tsadc_chip *chip; @@ -94,7 +93,7 @@ struct rockchip_thermal_data { enum tshut_polarity tshut_polarity; }; -/* TSADC V2 Sensor info define: */ +/* TSADC Sensor info define: */ #define TSADCV2_AUTO_CON 0x04 #define TSADCV2_INT_EN 0x08 #define TSADCV2_INT_PD 0x0c @@ -116,6 +115,8 @@ struct rockchip_thermal_data { #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) #define TSADCV2_DATA_MASK 0xfff +#define TSADCV3_DATA_MASK 0x3ff + #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */ @@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = { {3421, 125000}, }; +static const struct tsadc_table v3_code_table[] = { + {0, -40000}, + {106, -40000}, + {108, -35000}, + {110, -30000}, + {112, -25000}, + {114, -20000}, + {116, -15000}, + {118, -10000}, + {120, -5000}, + {122, 0}, + {124, 5000}, + {126, 10000}, + {128, 15000}, + {130, 20000}, + {132, 25000}, + {134, 30000}, + {136, 35000}, + {138, 40000}, + {140, 45000}, + {142, 50000}, + {144, 55000}, + {146, 60000}, + {148, 65000}, + {150, 70000}, + {152, 75000}, + {154, 80000}, + {156, 85000}, + {158, 90000}, + {160, 95000}, + {162, 100000}, + {163, 105000}, + {165, 110000}, + {167, 115000}, + {169, 120000}, + {171, 125000}, + {TSADCV3_DATA_MASK, 125000}, +}; + static u32 rk_tsadcv2_temp_to_code(long temp) { int high, low, mid; @@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp) return 0; } +static u32 rk_tsadcv3_temp_to_code(long temp) +{ + int high, low, mid; + + low = 0; + high = ARRAY_SIZE(v3_code_table) - 1; + mid = (high + low) / 2; + + if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp) + return 0; + + while (low <= high) { + if (temp == v3_code_table[mid].temp) + return v3_code_table[mid].code; + else if (temp < v3_code_table[mid].temp) + high = mid - 1; + else + low = mid + 1; + mid = (low + high) / 2; + } + + return 0; +} + +static int rk_tsadcv3_code_to_temp(u32 code, int *temp) +{ + unsigned int low = 1; + unsigned int high = ARRAY_SIZE(v3_code_table) - 1; + unsigned int mid = (low + high) / 2; + unsigned int num; + unsigned long denom; + + BUILD_BUG_ON(ARRAY_SIZE(v3_code_table) < 2); + + code &= TSADCV3_DATA_MASK; + if (code < v3_code_table[low].code) + return -EAGAIN; /* Incorrect reading */ + + while (low <= high) { + if (code >= v3_code_table[mid - 1].code && + code < v3_code_table[mid].code) + break; + else if (code > v3_code_table[mid].code) + low = mid + 1; + else + high = mid - 1; + mid = (low + high) / 2; + } + + /* + * The 5C granularity provided by the table is too much. Let's + * assume that the relationship between sensor readings and + * temperature between 2 table entries is linear and interpolate + * to produce less granular result. + */ + num = v3_code_table[mid].temp - v3_code_table[mid - 1].temp; + num *= code - v3_code_table[mid - 1].code; + denom = v3_code_table[mid].code - v3_code_table[mid - 1].code; + *temp = v3_code_table[mid - 1].temp + (num / denom); + + return 0; +} + /** - * rk_tsadcv2_initialize - initialize TASDC Controller - * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between - * every two accessing of TSADC in normal operation. - * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between - * every two accessing of TSADC after the temperature is higher - * than COM_SHUT or COM_INT. - * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE, - * if the temperature is higher than COMP_INT or COMP_SHUT for - * "debounce" times, TSADC controller will generate interrupt or TSHUT. + * rk_tsadcv2_initialize - initialize TASDC Controller. + * + * (1) Set TSADC_V2_AUTO_PERIOD: + * Configure the interleave between every two accessing of + * TSADC in normal operation. + * + * (2) Set TSADCV2_AUTO_PERIOD_HT: + * Configure the interleave between every two accessing of + * TSADC after the temperature is higher than COM_SHUT or COM_INT. + * + * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE: + * If the temperature is higher than COMP_INT or COMP_SHUT for + * "debounce" times, TSADC controller will generate interrupt or TSHUT. */ static void rk_tsadcv2_initialize(void __iomem *regs, enum tshut_polarity tshut_polarity) @@ -316,7 +423,31 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, writel_relaxed(val, regs + TSADCV2_INT_EN); } +static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, int *temp) +{ + u32 val; + + val = readl_relaxed(regs + TSADCV2_DATA(chn)); + + return rk_tsadcv3_code_to_temp(val, temp); +} + +static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp) +{ + u32 tshut_value, val; + + tshut_value = rk_tsadcv3_temp_to_code(temp); + writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn)); + + /* TSHUT will be valid */ + val = readl_relaxed(regs + TSADCV2_AUTO_CON); + writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON); +} + static const struct rockchip_tsadc_chip rk3288_tsadc_data = { + .cpu_id = 1, + .gpu_id = 2, + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ .tshut_temp = 95000, @@ -329,11 +460,31 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = { .set_tshut_mode = rk_tsadcv2_tshut_mode, }; +static const struct rockchip_tsadc_chip rk3368_tsadc_data = { + .cpu_id = 0, + .gpu_id = 1, + + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ + .tshut_temp = 95000, + + .initialize = rk_tsadcv2_initialize, + .irq_ack = rk_tsadcv2_irq_ack, + .control = rk_tsadcv2_control, + .get_temp = rk_tsadcv3_get_temp, + .set_tshut_temp = rk_tsadcv3_tshut_temp, + .set_tshut_mode = rk_tsadcv2_tshut_mode, +}; + static const struct of_device_id of_rockchip_thermal_match[] = { { .compatible = "rockchip,rk3288-tsadc", .data = (void *)&rk3288_tsadc_data, }, + { + .compatible = "rockchip,rk3368-tsadc", + .data = (void *)&rk3368_tsadc_data, + }, { /* end */ }, }; MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); @@ -441,7 +592,7 @@ static int rockchip_thermal_register_sensor(struct platform_device *pdev, struct rockchip_thermal_data *thermal, struct rockchip_thermal_sensor *sensor, - enum sensor_id id) + int id) { const struct rockchip_tsadc_chip *tsadc = thermal->chip; int error; @@ -557,7 +708,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev) error = rockchip_thermal_register_sensor(pdev, thermal, &thermal->sensors[0], - SENSOR_CPU); + thermal->chip->cpu_id); if (error) { dev_err(&pdev->dev, "failed to register CPU thermal sensor: %d\n", error); @@ -566,7 +717,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev) error = rockchip_thermal_register_sensor(pdev, thermal, &thermal->sensors[1], - SENSOR_GPU); + thermal->chip->gpu_id); if (error) { dev_err(&pdev->dev, "failed to register GPU thermal sensor: %d\n", error); @@ -661,7 +812,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) { - enum sensor_id id = thermal->sensors[i].id; + int id = thermal->sensors[i].id; thermal->chip->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);