From patchwork Mon Sep 21 20:58:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Richter X-Patchwork-Id: 7234071 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 658E79F30C for ; Mon, 21 Sep 2015 21:02:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 88DC52070E for ; Mon, 21 Sep 2015 21:02:12 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADE4B2070C for ; Mon, 21 Sep 2015 21:02:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ze8By-0001Vd-Qj; Mon, 21 Sep 2015 21:00:06 +0000 Received: from mail-wi0-x233.google.com ([2a00:1450:400c:c05::233]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ze8BV-0000x3-Pf for linux-arm-kernel@lists.infradead.org; Mon, 21 Sep 2015 20:59:39 +0000 Received: by wicgb1 with SMTP id gb1so132619760wic.1 for ; Mon, 21 Sep 2015 13:59:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=FtawEGpOiv2l1KBB+jvLwqu/VzFkZUno3bKE7vQFlM0=; b=unQRHnLLW+7OIeFX8nS5Y3Dqg4J4AfHozhLEHuFDoECWWGC6kxWntCukk9LAMtcaV7 X5BU1Gw+FnFVyUPJO1A5jEnRsRYaNEZCVxdIie2h30trdTZfuwm8SrrpHLC+9uy2XOWu mwBhPjpf+dZU0emwZ5H91Lec+gSM3bQNwyjTkvd8Dm7zAQUlMe2UT7lzjztt4fUz005F HLQcHgLHrlEaxZMD/pK3uKQJpLPu1BWCL4P9ALYyKPhhCh+ItRLujxs2EdN6OokzXQNT N7kav9v130/Gxjt2ZXMecEXZVQhpDTK4XFVJswu4C3sLc8+Ouk9Xn91QF4Z8A0Y4IXF/ Uf0A== X-Received: by 10.195.11.202 with SMTP id ek10mr27322082wjd.12.1442869156163; Mon, 21 Sep 2015 13:59:16 -0700 (PDT) Received: from rric.localdomain (x5ce0c059.dyn.telefonica.de. [92.224.192.89]) by smtp.gmail.com with ESMTPSA id db8sm25934462wjb.41.2015.09.21.13.59.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Sep 2015 13:59:15 -0700 (PDT) From: Robert Richter To: Marc Zygnier , Thomas Gleixner , Jason Cooper Subject: [PATCH v5 3/6] irqchip, gicv3-its: Read typer register outside the loop Date: Mon, 21 Sep 2015 22:58:36 +0200 Message-Id: <1442869119-1814-4-git-send-email-rric@kernel.org> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1442869119-1814-1-git-send-email-rric@kernel.org> References: <1442869119-1814-1-git-send-email-rric@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150921_135938_097675_33F79A0C X-CRM114-Status: GOOD ( 14.56 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Richter , Tirumalesh Chalamarla , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Robert Richter No need to read the typer register in the loop. Values do not change. This patch is basically a prerequisite for a follow-on patch that adds errata code for Cavium ThunderX. It moves the calculation of the number of id entries to the beginning of the function close to other setup values that are needed to allocate the its table. Now we have a central location to modify the setup parameters and the errata code can be implemented in a single block. Acked-by: Marc Zyngier Signed-off-by: Robert Richter --- drivers/irqchip/irq-gic-v3-its.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 0636cb33aeea..b073f28ea00d 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -815,6 +815,8 @@ static int its_alloc_tables(const char *node_name, struct its_node *its) int psz = SZ_64K; u64 shr = GITS_BASER_InnerShareable; u64 cache = GITS_BASER_WaWb; + u64 typer = readq_relaxed(its->base + GITS_TYPER); + u32 ids = GITS_TYPER_DEVBITS(typer); for (i = 0; i < GITS_BASER_NR_REGS; i++) { u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); @@ -838,9 +840,6 @@ static int its_alloc_tables(const char *node_name, struct its_node *its) * For other tables, only allocate a single page. */ if (type == GITS_BASER_TYPE_DEVICE) { - u64 typer = readq_relaxed(its->base + GITS_TYPER); - u32 ids = GITS_TYPER_DEVBITS(typer); - /* * 'order' was initialized earlier to the default page * granule of the the ITS. We can't have an allocation