From patchwork Tue Sep 22 17:59:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Richter X-Patchwork-Id: 7242521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 60F5B9F443 for ; Tue, 22 Sep 2015 18:03:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6A94320680 for ; Tue, 22 Sep 2015 18:03:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91B5120666 for ; Tue, 22 Sep 2015 18:03:25 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZeRrq-0002nQ-BT; Tue, 22 Sep 2015 18:00:38 +0000 Received: from mail-wi0-x22a.google.com ([2a00:1450:400c:c05::22a]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZeRrg-0002W9-3Y for linux-arm-kernel@lists.infradead.org; Tue, 22 Sep 2015 18:00:28 +0000 Received: by wicfx3 with SMTP id fx3so204496045wic.1 for ; Tue, 22 Sep 2015 11:00:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id; bh=/8tTqtxC/Y96XwK2RYqt2rqGT7aaGIXvcPKoSOe8+nQ=; b=BUL328zDeHw/skCNxhaDZsN4eTQ6ETuPnR8OxUE/OH5ZM/7oUwLkkkh1at/x1DUzmy cF0eA9xh/FyUHKEAbff9M7iFii3UrWsEeAPr9sgG/NMt12sH8B9tenxXCqjBs94Zhh5O Eb1rrPxcOaX+rOAvyRBpFWKyHKFHPdGN4Z65vYmViDYsUOpkKqf1/xFXSs3cri++2YTs OGd/ci2nICmIvGO7TI3bgd1A3eCpeZ5lIwWahwWEichCpZPhblMA8CWjRzk8IBNYaJSP rRom7VxV7VLGRdiRdkleq+1qVVhYq+Mk6s3h8T4s6m9+GGyiJlPNapSZh/xwrq/Swvdv PbUA== X-Received: by 10.180.12.241 with SMTP id b17mr22850731wic.55.1442944806174; Tue, 22 Sep 2015 11:00:06 -0700 (PDT) Received: from rric.localdomain (x5ce0c2f9.dyn.telefonica.de. [92.224.194.249]) by smtp.gmail.com with ESMTPSA id cm6sm4319899wib.22.2015.09.22.11.00.04 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Sep 2015 11:00:05 -0700 (PDT) From: Robert Richter To: Catalin Marinas , Will Deacon Subject: [PATCH] arm64: Increase the max granular size Date: Tue, 22 Sep 2015 19:59:48 +0200 Message-Id: <1442944788-17254-1-git-send-email-rric@kernel.org> X-Mailer: git-send-email 2.1.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150922_110028_299939_AE98D411 X-CRM114-Status: GOOD ( 10.99 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Robert Richter , Tirumalesh Chalamarla , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Tirumalesh Chalamarla Increase the standard cacheline size to avoid having locks in the same cacheline. Cavium's ThunderX core implements cache lines of 128 byte size. With current granulare size of 64 bytes (L1_CACHE_SHIFT=6) two locks could share the same cache line leading a performance degradation. Increasing the size fixes that. Increasing the size has no negative impact to cache invalidation on systems with a smaller cache line. There is an impact on memory usage, but that's not too important for arm64 use cases. Signed-off-by: Tirumalesh Chalamarla Signed-off-by: Robert Richter Acked-by: Timur Tabi --- arch/arm64/include/asm/cache.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h index bde449936e2f..5082b30bc2c0 100644 --- a/arch/arm64/include/asm/cache.h +++ b/arch/arm64/include/asm/cache.h @@ -18,7 +18,7 @@ #include -#define L1_CACHE_SHIFT 6 +#define L1_CACHE_SHIFT 7 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) /*