From patchwork Mon Sep 28 07:03:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 7275661 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 10A3F9F36A for ; Mon, 28 Sep 2015 07:06:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 248EA2073F for ; Mon, 28 Sep 2015 07:06:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4806C2073A for ; Mon, 28 Sep 2015 07:06:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZgSUC-0007ZK-Ju; Mon, 28 Sep 2015 07:04:32 +0000 Received: from webbox1416.server-home.net ([77.236.96.61]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZgSTU-0007Qq-Bd for linux-arm-kernel@lists.infradead.org; Mon, 28 Sep 2015 07:03:49 +0000 Received: from imapserver.systec-electronic.com (unknown [212.185.67.146]) by webbox1416.server-home.net (Postfix) with ESMTPA id 2167A27A6B0; Mon, 28 Sep 2015 09:03:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by imapserver.systec-electronic.com (Postfix) with ESMTP id 05451DA0C4A; Mon, 28 Sep 2015 09:03:23 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at imapserver.systec-electronic.com Received: from imapserver.systec-electronic.com ([127.0.0.1]) by localhost (imapserver.systec-electronic.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kmk6QmWL4tIL; Mon, 28 Sep 2015 09:03:20 +0200 (CEST) Received: from ws-stein.systec.local (ws-stein.systec.local [192.168.10.125]) by imapserver.systec-electronic.com (Postfix) with ESMTP id A5211DA0ABB; Mon, 28 Sep 2015 09:03:20 +0200 (CEST) From: Alexander Stein To: Shawn Guo , Sascha Hauer , Michael Turquette , Stephen Boyd Subject: [PATCH v3 1/1] ARM: imx31: Do not call mxc_timer_init twice when booting with DT Date: Mon, 28 Sep 2015 09:03:19 +0200 Message-Id: <1443423799-14685-1-git-send-email-alexander.stein@systec-electronic.com> X-Mailer: git-send-email 2.4.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150928_000348_727866_22BA9BBA X-CRM114-Status: GOOD ( 10.43 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexander Stein MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP mxc_timer_init must not be called from within mx31_clocks_init_dt. It will eventually be called by imx31_timer_init_dt (drivers/clocksource/timer-imx-gpt.c). This arranges the initialization code similar to clk-imx27.c Signed-off-by: Alexander Stein --- Changes in v3: * Fix compilation issues * Actually compile tested, but still untested due to lack of hardware * Added in v2 * Compile tested only due to lack of hardware drivers/clk/imx/clk-imx31.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index 1f83834..a908222 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -47,6 +47,8 @@ static const char *per_sel[] = { "per_div", "ipg", }; static const char *csi_sel[] = { "upll", "spll", }; static const char *fir_sel[] = { "mcu_main", "upll", "spll" }; +static u32 fref = 26000000; /* default */ + enum mx31_clks { dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, per_div, per, csi, fir, csi_div, usb_div_pre, usb_div_post, fir_div_pre, @@ -62,7 +64,7 @@ enum mx31_clks { static struct clk *clk[clk_max]; static struct clk_onecell_data clk_data; -int __init mx31_clocks_init(unsigned long fref) +static void __init _mx31_clocks_init(unsigned long fref) { void __iomem *base; struct device_node *np; @@ -132,6 +134,12 @@ int __init mx31_clocks_init(unsigned long fref) imx_check_clocks(clk, ARRAY_SIZE(clk)); + clk_set_parent(clk[csi], clk[upll]); + clk_prepare_enable(clk[emi_gate]); + clk_prepare_enable(clk[iim_gate]); + mx31_revision(); + clk_disable_unprepare(clk[iim_gate]); + np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm"); if (np) { @@ -139,6 +147,11 @@ int __init mx31_clocks_init(unsigned long fref) clk_data.clk_num = ARRAY_SIZE(clk); of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); } +} + +int __init mx31_clocks_init(void) +{ + _mx31_clocks_init(fref); clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); @@ -194,12 +207,6 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma"); clk_register_clkdev(clk[iim_gate], "iim", NULL); - clk_set_parent(clk[csi], clk[upll]); - clk_prepare_enable(clk[emi_gate]); - clk_prepare_enable(clk[iim_gate]); - mx31_revision(); - clk_disable_unprepare(clk[iim_gate]); - mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT, GPT_TYPE_IMX31); return 0; @@ -208,7 +215,6 @@ int __init mx31_clocks_init(unsigned long fref) int __init mx31_clocks_init_dt(void) { struct device_node *np; - u32 fref = 26000000; /* default */ for_each_compatible_node(np, NULL, "fixed-clock") { if (!of_device_is_compatible(np, "fsl,imx-osc26m")) @@ -218,5 +224,7 @@ int __init mx31_clocks_init_dt(void) break; } - return mx31_clocks_init(fref); + _mx31_clocks_init(fref); + + return 0; }