From patchwork Tue Sep 29 20:29:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Baker X-Patchwork-Id: 7289831 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 70C309F302 for ; Tue, 29 Sep 2015 20:32:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 858DF206C5 for ; Tue, 29 Sep 2015 20:32:27 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 98ED620661 for ; Tue, 29 Sep 2015 20:32:26 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zh1Xt-00020p-DC; Tue, 29 Sep 2015 20:30:41 +0000 Received: from mail-pa0-f46.google.com ([209.85.220.46]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zh1X0-0001h4-7J for linux-arm-kernel@lists.infradead.org; Tue, 29 Sep 2015 20:29:46 +0000 Received: by padhy16 with SMTP id hy16so15638261pad.1 for ; Tue, 29 Sep 2015 13:29:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=xxFROCuoNcTcKpNAnh+Z0b84oZUpIfbL4UY2mQc5XrA=; b=ev6CfkxJuxIMUbNm0eOYuqzPxL+uQ119QRxZOPkbU34WdE330Gu6X0QtOz7S9elvFF 6CD3vEzGvVv4tMdTFWwNPhKyGOu1JOJxZl72eb3TBCV1EmePWc1K9DUvmvzTHExz6vLc 3D85HVUcEcgARoT4KJDMLtYkLZ7iFc2O/51yymtoPGyYZK9Ua+YpZDdxc/STcxeXI11g zJp+cllDca+SZ/OkCfeYuvRAII8aBwF6zll8QdjqujAgquoh+hGFeE66iTPxMdXLIOAZ xCFBGWPVKJzN6pmyJJvBJREEDtSd65MoYCDq3hCD6LhD9kiiGKz0rXFx1QdZEuX3VoO+ DyMA== X-Gm-Message-State: ALoCoQk3jAsVOxdx6MmBkSeGCQ2zbSXi0GaUIN9FahYdWyw4dLTjtBOgWHQzQDrhu6TqoGktIs2V X-Received: by 10.68.179.33 with SMTP id dd1mr35413306pbc.134.1443558565365; Tue, 29 Sep 2015 13:29:25 -0700 (PDT) Received: from localhost.localdomain ([173.14.250.228]) by smtp.gmail.com with ESMTPSA id f5sm27330036pas.23.2015.09.29.13.29.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 Sep 2015 13:29:24 -0700 (PDT) From: Tyler Baker To: arm@kernel.org, Wei Xu Subject: [PATCH] arm64: dts: add all hi6220 uart nodes Date: Tue, 29 Sep 2015 13:29:12 -0700 Message-Id: <1443558552-5734-1-git-send-email-tyler.baker@linaro.org> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150929_132946_313437_BAD93353 X-CRM114-Status: GOOD ( 14.19 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Bintian Wang , Pawel Moll , Ian Campbell , Tyler Baker , broonie@kernel.org, khilman@kernel.org, Will Deacon , Rob Herring , Haojian Zhuang , grant.likely@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds all UART nodes for the Hi6220 SoC. Recently a board[1] has been developed to standardize UART access across all the 96boards consumer edition boards. To use this hardware on HiKey we must configure and enable UART3. However, to ensure backward compatibility we must keep UART0 enabled as well. I have removed the hard coded clock index values in favor of using the ones already defined in include/dt-bindings/clock/hi6220-clock.h. This patch was boot tested on top of next-20150929, with both UART configurations. [1] http://www.seeedstudio.com/depot/96Boards-UART-p-2525.html?ref=newInBazaar Signed-off-by: Tyler Baker --- arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 4 +++ arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 43 +++++++++++++++++++++++++- 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e36a539..34486bc 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -18,6 +18,10 @@ aliases { serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; }; chosen { diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..82d2488 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { compatible = "hisilicon,hi6220"; @@ -164,8 +165,48 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; interrupts = ; - clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; + clocks = <&ao_ctrl HI6220_UART0_PCLK>, + <&ao_ctrl HI6220_UART0_PCLK>; clock-names = "uartclk", "apb_pclk"; }; + + uart1: uart@f7111000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7111000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART1_PCLK>, + <&sys_ctrl HI6220_UART1_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart2: uart@f7112000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7112000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART2_PCLK>, + <&sys_ctrl HI6220_UART2_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart3: uart@f7113000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7113000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART3_PCLK>, + <&sys_ctrl HI6220_UART3_PCLK>; + clock-names = "uartclk", "apb_pclk"; + }; + + uart4: uart@f7114000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7114000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART4_PCLK>, + <&sys_ctrl HI6220_UART4_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; }; };