From patchwork Thu Oct 1 01:19:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Baker X-Patchwork-Id: 7303501 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 985709F444 for ; Thu, 1 Oct 2015 01:22:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AE43520726 for ; Thu, 1 Oct 2015 01:22:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AA5E22063A for ; Thu, 1 Oct 2015 01:22:01 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhSXk-0004KA-C2; Thu, 01 Oct 2015 01:20:20 +0000 Received: from mail-pa0-f49.google.com ([209.85.220.49]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZhSXh-00038n-Bi for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2015 01:20:18 +0000 Received: by padhy16 with SMTP id hy16so56760477pad.1 for ; Wed, 30 Sep 2015 18:19:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=EsDHPWwCGiuTY2Gkcdb+LjACJFu7HCLPuUAzV9HQixM=; b=gurfpbsbHxHO6Ard3M/coIGQT3RayH6FJY5p7J+Am+S85n4xQw993sMQ091c5X6ZgH dyHNGZLPsQQrQkjvEoNcnonW0HS7if7ina3Y9hdfDQGR6DyWGCKzrlDFGZ940XxPaXA4 PQQx4n6LbEsRcxWe+eImhmrC1QsYsgVIdsa13uKGS3kR5OOgK4djGhiXhV9LKv43hAgk NFTThNHW/y9x3eTw13dmxN8lrgRbfIPpNIvABJLP25gHz80kCMAW2zmAOoFYSAVxa5Ak 05kAz9MAzPf83vT4YEkVw6tMV+o+lErcxnIiwRzlIO/Utps0ST/JyyEDNvibHalZGnPG meRw== X-Gm-Message-State: ALoCoQmcBxTEm2nnniHA6Jnl0ZZaB8U5YQHySDi80HmE3ee9AbFG9KcdEbMvZwJr2y79ocLAg6tJ X-Received: by 10.68.108.101 with SMTP id hj5mr8453544pbb.156.1443662396032; Wed, 30 Sep 2015 18:19:56 -0700 (PDT) Received: from localhost.localdomain ([173.14.250.228]) by smtp.gmail.com with ESMTPSA id ne10sm382861pbc.96.2015.09.30.18.19.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 30 Sep 2015 18:19:54 -0700 (PDT) From: Tyler Baker To: arm@kernel.org, Wei Xu Subject: [PATCH v2] arm64: dts: add all hi6220 uart nodes Date: Wed, 30 Sep 2015 18:19:48 -0700 Message-Id: <1443662388-25686-1-git-send-email-tyler.baker@linaro.org> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150930_182017_440572_EB74A4E4 X-CRM114-Status: GOOD ( 15.96 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Ricardo Salveti , Bintian Wang , Arnd Bergmann , Pawel Moll , Ian Campbell , Tyler Baker , Mark Brown , Kevin Hilman , Will Deacon , Amit Kucheria , Peter Griffin , devicetree@vger.kernel.org, Rob Herring , Haojian Zhuang , grant.likely@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds all UART nodes for the Hi6220 SoC. Recently a board[1] has been developed to standardize UART access across all the 96boards consumer edition boards. To use this hardware on HiKey we must configure and enable UART3. However, to ensure backward compatibility we must keep UART0 enabled as well. I have removed the hard coded clock index values in favor of using the ones already defined in include/dt-bindings/clock/hi6220-clock.h. Since UART0 needs to be soldered, it has been suggested to use the UART3 as the default console. This patch was boot tested on top of next-20150930, with both UART configurations. [1] http://www.seeedstudio.com/depot/96Boards-UART-p-2525.html?ref=newInBazaar Signed-off-by: Tyler Baker --- In v2: - Drop unused alias, and add comments. (Arnd, Rob) - Switch default console to use UART3 with stdout-path. (Mark, Rob) arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 7 +++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 43 +++++++++++++++++++++++++- 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts index e36a539..aa101ac 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts @@ -17,11 +17,14 @@ compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; aliases { - serial0 = &uart0; + serial0 = &uart0; /* On board UART0 */ + serial1 = &uart1; /* BT UART */ + serial2 = &uart2; /* LS Expansion UART0 */ + serial3 = &uart3; /* LS Expansion UART1 */ }; chosen { - stdout-path = "serial0:115200n8"; + stdout-path = "serial3:115200n8"; }; memory@0 { diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 3f03380..82d2488 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -5,6 +5,7 @@ */ #include +#include / { compatible = "hisilicon,hi6220"; @@ -164,8 +165,48 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; interrupts = ; - clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; + clocks = <&ao_ctrl HI6220_UART0_PCLK>, + <&ao_ctrl HI6220_UART0_PCLK>; clock-names = "uartclk", "apb_pclk"; }; + + uart1: uart@f7111000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7111000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART1_PCLK>, + <&sys_ctrl HI6220_UART1_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart2: uart@f7112000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7112000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART2_PCLK>, + <&sys_ctrl HI6220_UART2_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + + uart3: uart@f7113000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7113000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART3_PCLK>, + <&sys_ctrl HI6220_UART3_PCLK>; + clock-names = "uartclk", "apb_pclk"; + }; + + uart4: uart@f7114000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0xf7114000 0x0 0x1000>; + interrupts = ; + clocks = <&sys_ctrl HI6220_UART4_PCLK>, + <&sys_ctrl HI6220_UART4_PCLK>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; }; };