From patchwork Mon Nov 19 16:01:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Cartwright X-Patchwork-Id: 1768011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 928313FCAE for ; Mon, 19 Nov 2012 19:00:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TaWX3-0001NK-W8; Mon, 19 Nov 2012 18:57:23 +0000 Received: from mailserver5.natinst.com ([130.164.80.5] helo=spamkiller05.natinst.com) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TaWGR-0000JB-Av for linux-arm-kernel@lists.infradead.org; Mon, 19 Nov 2012 18:40:15 +0000 Received: from mailserv59-us.natinst.com (nb-hsrp-1338.natinst.com [130.164.19.133]) by spamkiller05.natinst.com (8.14.5/8.14.5) with ESMTP id qAJIe8JP013923; Mon, 19 Nov 2012 12:40:08 -0600 Received: from beefymiracle.amer.corp.natinst.com ([130.164.14.197]) by mailserv59-us.natinst.com (Lotus Domino Release 8.5.3FP2 HF169) with ESMTP id 2012111912400814-248286 ; Mon, 19 Nov 2012 12:40:08 -0600 Received: by beefymiracle.amer.corp.natinst.com (Postfix, from userid 1000) id BAB98600E6; Mon, 19 Nov 2012 12:40:16 -0600 (CST) Message-Id: <1443f143846f22125e3d6631cf3a2fdf75d925d3.1353349191.git.josh.cartwright@ni.com> In-Reply-To: References: From: Josh Cartwright Date: Mon, 19 Nov 2012 10:01:03 -0600 Subject: [PATCH 1/3] ARM: zynq: remove TTC early mapping To: Michal Simek , arm@kernel.org X-MIMETrack: Itemize by SMTP Server on MailServ59-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 11/19/2012 12:40:08 PM, Serialize by Router on MailServ59-US/AUS/H/NIC(Release 8.5.3FP2 HF169|September 14, 2012) at 11/19/2012 12:40:08 PM, Serialize complete at 11/19/2012 12:40:08 PM X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.9.8185, 1.0.431, 0.0.0000 definitions=2012-11-19_07:2012-11-19, 2012-11-19, 1970-01-01 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121119_134012_840391_28BB632F X-CRM114-Status: GOOD ( 12.47 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Now that the TTC driver has proper support for DT bindings, it is not necessary for the registers to be mapped early. They will be mapped during clock initialization using of_iomap(). Remove the early mapping. In addition, remove the extraneous zynq_soc.h include from the timer driver. Signed-off-by: Josh Cartwright Tested-by: Michal Simek --- arch/arm/mach-zynq/common.c | 5 ----- arch/arm/mach-zynq/include/mach/zynq_soc.h | 6 +----- arch/arm/mach-zynq/timer.c | 1 - 3 files changed, 1 insertion(+), 11 deletions(-) diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 79bf5fb..2202f67 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -74,11 +74,6 @@ static void __init xilinx_irq_init(void) static struct map_desc io_desc[] __initdata = { { - .virtual = TTC0_VIRT, - .pfn = __phys_to_pfn(TTC0_PHYS), - .length = TTC0_SIZE, - .type = MT_DEVICE, - }, { .virtual = SCU_PERIPH_VIRT, .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), .length = SCU_PERIPH_SIZE, diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h index 5ebbd8e..2995044 100644 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h @@ -29,13 +29,9 @@ #define UART_SIZE SZ_4K #define UART_VIRT 0xF0001000 -#define TTC0_PHYS 0xF8001000 -#define TTC0_SIZE SZ_4K -#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE) - #define SCU_PERIPH_PHYS 0xF8F00000 #define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE) +#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) #if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) # define LL_UART_PADDR UART1_PHYS diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 9662306..de3df28 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -29,7 +29,6 @@ #include #include -#include #include "common.h" /*