From patchwork Sun Oct 11 09:55:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 7368701 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 98EB4BEEA4 for ; Sun, 11 Oct 2015 09:58:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CE907206A9 for ; Sun, 11 Oct 2015 09:58:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B1303206A5 for ; Sun, 11 Oct 2015 09:58:36 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZlDM1-0000yF-Mb; Sun, 11 Oct 2015 09:55:45 +0000 Received: from mx1.redhat.com ([209.132.183.28]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZlDLq-0000lR-Or for linux-arm-kernel@lists.infradead.org; Sun, 11 Oct 2015 09:55:35 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (Postfix) with ESMTPS id 6B67A70; Sun, 11 Oct 2015 09:55:14 +0000 (UTC) Received: from shalem.localdomain.com (vpn1-7-136.ams2.redhat.com [10.36.7.136]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t9B9tAbp023260; Sun, 11 Oct 2015 05:55:11 -0400 From: Hans de Goede To: Thierry Reding , Maxime Ripard Subject: [PATCH v3 1/4] ARM: dts: sun5i: Add PWM controller node for A13 / A10s Date: Sun, 11 Oct 2015 11:55:05 +0200 Message-Id: <1444557308-10892-1-git-send-email-hdegoede@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151011_025534_865166_2342732D X-CRM114-Status: UNSURE ( 9.07 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, Hans de Goede , linux-arm-kernel@lists.infradead.org, devicetree MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add dts nodes for the PWM controller on the A13 / A10s. Signed-off-by: Hans de Goede --- Changes in v3: -Use a separate compatible string for a10s and a13 --- arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++ arch/arm/boot/dts/sun5i-a13.dtsi | 10 ++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 0fdabe8..f7dcf4e 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -165,6 +165,14 @@ #size-cells = <0>; }; + pwm: pwm@01c20e00 { + compatible = "allwinner,sun5i-a10s-pwm"; + reg = <0x01c20e00 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index f3631c9..d910d3a 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -150,6 +150,16 @@ "apb1_uart3"; }; }; + + soc@01c00000 { + pwm: pwm@01c20e00 { + compatible = "allwinner,sun5i-a13-pwm"; + reg = <0x01c20e00 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + }; }; &cpu0 {