From patchwork Wed Oct 14 13:12:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 7395121 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 54CAB9F36A for ; Wed, 14 Oct 2015 13:15:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 646142083B for ; Wed, 14 Oct 2015 13:15:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E364220832 for ; Wed, 14 Oct 2015 13:15:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZmLsX-0002VQ-FZ; Wed, 14 Oct 2015 13:14:01 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZmLs5-00021r-IC for linux-arm-kernel@lists.infradead.org; Wed, 14 Oct 2015 13:13:35 +0000 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id t9EDD0Xp028436; Wed, 14 Oct 2015 08:13:00 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9EDD0aU029444; Wed, 14 Oct 2015 08:13:00 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.224.2; Wed, 14 Oct 2015 08:13:00 -0500 Received: from dlep32.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t9EDCRpA025212; Wed, 14 Oct 2015 08:12:55 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH 05/13] dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq Date: Wed, 14 Oct 2015 16:12:16 +0300 Message-ID: <1444828344-21378-6-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.6.1 In-Reply-To: <1444828344-21378-1-git-send-email-peter.ujfalusi@ti.com> References: <1444828344-21378-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151014_061333_807924_7858377B X-CRM114-Status: GOOD ( 12.63 ) X-Spam-Score: -6.9 (------) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, arnd@arndb.de, tony@atomide.com, r.schwebel@pengutronix.de, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, olof@lixom.net, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP edma_assign_channel_eventq() is a wrapper around edma_map_dmach_to_queue() We can merge the content of the later so we will have only one function to be used for mapping channels to given eventq Signed-off-by: Peter Ujfalusi --- drivers/dma/edma.c | 56 +++++++++++++++++++++--------------------------------- 1 file changed, 22 insertions(+), 34 deletions(-) diff --git a/drivers/dma/edma.c b/drivers/dma/edma.c index d8639a92f286..a02f84c7c3d7 100644 --- a/drivers/dma/edma.c +++ b/drivers/dma/edma.c @@ -391,22 +391,6 @@ static inline void clear_bits(int offset, int len, unsigned long *p) clear_bit(offset + (len - 1), p); } -static void edma_map_dmach_to_queue(struct edma_chan *echan, - enum dma_event_q queue_no) -{ - struct edma_cc *ecc = echan->ecc; - int channel = EDMA_CHAN_SLOT(echan->ch_num); - int bit = (channel & 0x7) * 4; - - /* default to low priority queue */ - if (queue_no == EVENTQ_DEFAULT) - queue_no = ecc->default_queue; - - queue_no &= 7; - edma_modify_array(ecc, EDMA_DMAQNUM, (channel >> 3), ~(0x7 << bit), - queue_no << bit); -} - static void edma_assign_priority_to_queue(struct edma_cc *ecc, int queue_no, int priority) { @@ -723,6 +707,25 @@ static void edma_clean_channel(struct edma_chan *echan) edma_write(ecc, EDMA_CCERRCLR, BIT(16) | BIT(1) | BIT(0)); } +/* Move channel to a specific event queue */ +static void edma_assign_channel_eventq(struct edma_chan *echan, + enum dma_event_q eventq_no) +{ + struct edma_cc *ecc = echan->ecc; + int channel = EDMA_CHAN_SLOT(echan->ch_num); + int bit = (channel & 0x7) * 4; + + /* default to low priority queue */ + if (eventq_no == EVENTQ_DEFAULT) + eventq_no = ecc->default_queue; + if (eventq_no >= ecc->num_tc) + return; + + eventq_no &= 7; + edma_modify_array(ecc, EDMA_DMAQNUM, (channel >> 3), ~(0x7 << bit), + eventq_no << bit); +} + static int edma_alloc_channel(struct edma_chan *echan, enum dma_event_q eventq_no) { @@ -751,7 +754,7 @@ static int edma_alloc_channel(struct edma_chan *echan, edma_setup_interrupt(echan, true); - edma_map_dmach_to_queue(echan, eventq_no); + edma_assign_channel_eventq(echan, eventq_no); return 0; } @@ -764,21 +767,6 @@ static void edma_free_channel(struct edma_chan *echan) edma_setup_interrupt(echan, false); } -/* Move channel to a specific event queue */ -static void edma_assign_channel_eventq(struct edma_chan *echan, - enum dma_event_q eventq_no) -{ - struct edma_cc *ecc = echan->ecc; - - /* default to low priority queue */ - if (eventq_no == EVENTQ_DEFAULT) - eventq_no = ecc->default_queue; - if (eventq_no >= ecc->num_tc) - return; - - edma_map_dmach_to_queue(echan, eventq_no); -} - static inline struct edma_cc *to_edma_cc(struct dma_device *d) { return container_of(d, struct edma_cc, dma_slave); @@ -2148,8 +2136,8 @@ static int edma_probe(struct platform_device *pdev) for (i = 0; i < ecc->num_channels; i++) { /* Assign all channels to the default queue */ - edma_map_dmach_to_queue(&ecc->slave_chans[i], - info->default_queue); + edma_assign_channel_eventq(&ecc->slave_chans[i], + info->default_queue); /* Set entry slot to the dummy slot */ edma_set_chmap(&ecc->slave_chans[i], ecc->dummy_slot); }