From patchwork Fri Oct 23 01:54:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7469431 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 10479BEEA4 for ; Fri, 23 Oct 2015 01:58:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4F0D8207BB for ; Fri, 23 Oct 2015 01:58:00 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D5C72058C for ; Fri, 23 Oct 2015 01:57:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpRam-0004vt-Fu; Fri, 23 Oct 2015 01:56:28 +0000 Received: from mail-pa0-f65.google.com ([209.85.220.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpRaC-0004Xf-Rv; Fri, 23 Oct 2015 01:55:56 +0000 Received: by padda3 with SMTP id da3so10878997pad.1; Thu, 22 Oct 2015 18:55:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1HMsxKoLxTcayLLiKCuayFCXeHKomY1cOdGJbLnSQNQ=; b=RN2bN7jBIVk4X/Z2DwoeL7VI5E4gi4Aq1wB8JX8e5gFTe3pTxnj+7diHq+6ZEfAdz4 ALtQ7Lf/5UMW6k/ntRI6P9cvFeJh8+X/BkEKhyDEJcP/2Fn4TOUBxeqVjLkcy3rYjsJ4 eOWlzbTaecvRopdGGgBvUn4e+UBOGGOCW6zoJNCk95S3619ucaAVo4aNN0FbFnwoV30/ Lr1kf9Au9VpVTm5HzoaqdsWZW1L4FbFw4nfXnjDqMCNkKlVvBAA8qVeVaJ3jgHZOFvPN CJiUO2ylvm+2idIWOM/MWTTOGYtrhNl6tFoGmIOq22p/woZDZ75REXyhI1HtDDT8Y7Fx 9i3Q== X-Received: by 10.68.130.74 with SMTP id oc10mr1905017pbb.159.1445565332038; Thu, 22 Oct 2015 18:55:32 -0700 (PDT) Received: from localhost.localdomain ([43.226.228.195]) by smtp.gmail.com with ESMTPSA id w8sm15967438pbs.87.2015.10.22.18.55.26 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 22 Oct 2015 18:55:31 -0700 (PDT) From: Caesar Wang To: Heiko Stuebner Subject: [PATCH v3 2/3] thermal: rockchip: ensure the otp states before resetting the controller Date: Fri, 23 Oct 2015 09:54:55 +0800 Message-Id: <1445565296-31517-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445565296-31517-1-git-send-email-wxt@rock-chips.com> References: <1445565296-31517-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151022_185553_110942_3121B519 X-CRM114-Status: GOOD ( 12.21 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, Dmitry Torokhov , linux-kernel@vger.kernel.org, dianders@chromium.org, Eduardo Valentin , linux-rockchip@lists.infradead.org, Zhang Rui , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We need the OTP pin is gpio state before resetting the TSADC controller, since the tshut polarity will generate a high signal. Says: The TSHUT temperature is setting more than 80 degree, the default tshut polarity is high. If T > 80C, the OTP output the high signal. If T < 80C, the OTP output the low signal. On the moment, the tshut polarity will be low in a short period of time if the TSADC controller is reset. So: If T < 80C, the OTP output the High Signal. If T > 80C, the OTP output the Low Signal. In some cases, the OTP pin is connected to the PMIC, maybe the PMIC can accept the reset response time to avoid this issue. In other words, the system will be always reboot if we make the OTP pin is connected the others IC to control the power. Signed-off-by: Caesar Wang --- Changes in v3: - Add the pinctrl state for in the suspend/resume. Changes in v2: None Changes in v1: None drivers/thermal/rockchip_thermal.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index c89ffb2..3b8fbda 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -642,6 +642,8 @@ static int __maybe_unused rockchip_thermal_suspend(struct device *dev) clk_disable(thermal->pclk); clk_disable(thermal->clk); + pinctrl_pm_select_sleep_state(dev); + return 0; } @@ -678,6 +680,8 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev) for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); + pinctrl_pm_select_default_state(dev); + return 0; }