From patchwork Fri Oct 23 09:04:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 7470971 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B1FF99F1C3 for ; Fri, 23 Oct 2015 09:08:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B60B120755 for ; Fri, 23 Oct 2015 09:08:19 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8DBCE2074A for ; Fri, 23 Oct 2015 09:08:17 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpYHl-0007LZ-7G; Fri, 23 Oct 2015 09:05:17 +0000 Received: from mail-lf0-f47.google.com ([209.85.215.47]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZpYHh-0006BR-Vf for linux-arm-kernel@lists.infradead.org; Fri, 23 Oct 2015 09:05:15 +0000 Received: by lffv3 with SMTP id v3so76135289lff.0 for ; Fri, 23 Oct 2015 02:04:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=n7gq6d+Ro/NIefPPUv7Uk29MlsOGFy7QMgHzGAEEBNg=; b=MHhx5JU8qh43hthfhx2ptkQcAgwL7Kw5La3iYV3YmEhl8pW0USXawBESG1Lhg/0Aey p1K9SI1WiC0AddypSd5LNxCcMiM/d88VvM3f5OqT99JTAwy1n/2b4OBdcV49HD9Ed9LB JG5YwUDmZtJ1M55zIvt+Y2oYWweNvG+rFNoJKdeTCPB5s7kzeUXXIjc+ZM/Xs15sSn/B wZGk9Go3ZegOCL8DQJNJtf6sPV3e/DW7AZ59T14p4knSnkvLoqeXrLlmPc20XqVgLw5c vRK6zMyupPRmft7lbKR7vFmGUo25JbOuABM1aQsbJU/BEY4R4Q1WhD+rKJFnQe6CVzlg rY6g== X-Gm-Message-State: ALoCoQmWbqtjzIw3NeW8ndez8HGhjXN83+I+ekrazF8TIwwAlfqtusB+r2mvqwK2z4YaXt5RUuA0 X-Received: by 10.25.28.131 with SMTP id c125mr5607122lfc.99.1445591091206; Fri, 23 Oct 2015 02:04:51 -0700 (PDT) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id o197sm2879941lfb.7.2015.10.23.02.04.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Oct 2015 02:04:50 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Russell King , Marc Zyngier Subject: [PATCH 05/13 v2] irqchip/gic: assign irqchip dynamically Date: Fri, 23 Oct 2015 11:04:43 +0200 Message-Id: <1445591083-22494-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151023_020514_224052_7A6A5D02 X-CRM114-Status: GOOD ( 19.80 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Jason Cooper , Pawel Moll , Linus Walleij , Will Deacon , Thomas Gleixner MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Instead of having the irqchip being a static struct, make it part of the per-instance data so we can assign it a dynamic name. This has the usable side effect of displaying the GIC with an instance number as GIC0, GIC1 ... GICn in /proc/interrupts, which is helpful when debugging cascaded GICs, such as on the ARM PB11MPCore. Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Keep the static structs around, just delete the .name field assign them to the chips at registration time, updating the name field with the instance number. - Also enumerate the EOIMODE1 sub-chips. Marc: can't test the EOIMODE1 thing, it's far above me, but it "should work". Is it correct that there is one unique and coupled EOIMODE1 instance per GIC instance like this? --- drivers/irqchip/irq-gic.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index bd021e1e4847..8c93ff80ec52 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -58,6 +58,8 @@ union gic_base { }; struct gic_chip_data { + struct irq_chip chip; + struct irq_chip eoimode1_chip; union gic_base dist_base; union gic_base cpu_base; #ifdef CONFIG_CPU_PM @@ -370,7 +372,6 @@ static void gic_handle_cascade_irq(struct irq_desc *desc) } static struct irq_chip gic_chip = { - .name = "GIC", .irq_mask = gic_mask_irq, .irq_unmask = gic_unmask_irq, .irq_eoi = gic_eoi_irq, @@ -386,7 +387,6 @@ static struct irq_chip gic_chip = { }; static struct irq_chip gic_eoimode1_chip = { - .name = "GICv2", .irq_mask = gic_eoimode1_mask_irq, .irq_unmask = gic_unmask_irq, .irq_eoi = gic_eoimode1_eoi_irq, @@ -880,11 +880,12 @@ void __init gic_init_physaddr(struct device_node *node) static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) { - struct irq_chip *chip = &gic_chip; + struct gic_chip_data *gic = d->host_data; + struct irq_chip *chip = &gic->chip; if (static_key_true(&supports_deactivate)) { if (d->host_data == (void *)&gic_data[0]) - chip = &gic_eoimode1_chip; + chip = &gic->eoimode1_chip; } if (hw < 32) { @@ -989,6 +990,13 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start, BUG_ON(gic_nr >= MAX_GIC_NR); gic = &gic_data[gic_nr]; + + /* Initialize irq_chip */ + gic->chip = gic_chip; + gic->eoimode1_chip = gic_eoimode1_chip; + gic->chip.name = kasprintf(GFP_KERNEL, "GIC%d", gic_nr); + gic->eoimode1_chip.name = kasprintf(GFP_KERNEL, "GICv2%d", gic_nr); + #ifdef CONFIG_GIC_NON_BANKED if (percpu_offset) { /* Frankein-GIC without banked registers... */ unsigned int cpu;