From patchwork Mon Nov 2 03:14:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7533151 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CF2AE9FBE7 for ; Mon, 2 Nov 2015 03:16:51 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0DB3020434 for ; Mon, 2 Nov 2015 03:16:51 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2FB3C20567 for ; Mon, 2 Nov 2015 03:16:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zt5a4-0005Pg-3m; Mon, 02 Nov 2015 03:14:48 +0000 Received: from mail-pa0-f65.google.com ([209.85.220.65]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Zt5Zz-0005Ok-ER; Mon, 02 Nov 2015 03:14:45 +0000 Received: by padfb7 with SMTP id fb7so15313778pad.0; Sun, 01 Nov 2015 19:14:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id; bh=CdSzBlchHfQ7J8yquEBKr8qpJZKvHsG0+OQ8rRmrThs=; b=MS+yczSf0090j19yjWvB1F40/woYhxDv9XihQe4IWGaFGRJIG/tgYMCWzq++w11zJ0 gTh8VniYRerMwVyWf6ivbHS26XghF4wsVNk94AtP4IQf79aNnbqR7ZGyB6K3+gmHDjdC cmbrMDG2nKR4GJbhPwSjOHuagq1kodG7s/pr1pLoqcoGFqPqqR+72V8BGLjxebLxg9i/ 41CnZUWuItJX0UZzXqtz+dcBGZyrF83n1LR5Kh8K4m9poRn75RlCVpsxwl0n2B5hK/xH Gwxj1HxxEDJs/aMAWnqlEM58moUuYzVIchK1XShbjOdTlmhJoWg7fLq8MW1JxRtg1U/c lmdQ== X-Received: by 10.68.138.233 with SMTP id qt9mr24716253pbb.39.1446434062133; Sun, 01 Nov 2015 19:14:22 -0800 (PST) Received: from localhost.localdomain ([103.47.144.160]) by smtp.gmail.com with ESMTPSA id ir4sm20727873pbb.93.2015.11.01.19.14.16 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 01 Nov 2015 19:14:20 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , Mark Brown Subject: [PATCH 1/3] ASoC: rockchip: i2s: Add set the divider clock API Date: Mon, 2 Nov 2015 11:14:00 +0800 Message-Id: <1446434042-2139-1-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151101_191443_532610_01BFAAE9 X-CRM114-Status: GOOD ( 12.12 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alsa-devel@alsa-project.org, Liam Girdwood , linux-kernel@vger.kernel.org, Takashi Iwai , Jaroslav Kysela , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to support more rates, add the divider clock api. As the input source clock to the module is MCLK_I2S, and by the divider of the module, the clock generator generates SCLK and LRCK to transmitter and receiver. Signed-off-by: Caesar Wang --- sound/soc/rockchip/rockchip_i2s.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index b936102..2086a6a 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -286,6 +286,34 @@ static int rockchip_i2s_trigger(struct snd_pcm_substream *substream, return ret; } +static int rockchip_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + struct rk_i2s_dev *i2s = to_info(cpu_dai); + unsigned int val = 0; + + dev_dbg(i2s->dev, "%s: div_id=%d, div=%d\n", __func__, div_id, div); + + switch (div_id) { + case ROCKCHIP_DIV_BCLK: + val |= I2S_CKR_TSD(div); + val |= I2S_CKR_RSD(div); + regmap_update_bits(i2s->regmap, I2S_CKR, + I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK, + val); + break; + case ROCKCHIP_DIV_MCLK: + val |= I2S_CKR_MDIV(div); + regmap_update_bits(i2s->regmap, I2S_CKR, + I2S_CKR_MDIV_MASK, val); + break; + default: + return -EINVAL; + } + + return 0; +} + static int rockchip_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, int clk_id, unsigned int freq, int dir) { @@ -311,6 +339,7 @@ static int rockchip_i2s_dai_probe(struct snd_soc_dai *dai) static const struct snd_soc_dai_ops rockchip_i2s_dai_ops = { .hw_params = rockchip_i2s_hw_params, + .set_clkdiv = rockchip_i2s_set_clkdiv, .set_sysclk = rockchip_i2s_set_sysclk, .set_fmt = rockchip_i2s_set_fmt, .trigger = rockchip_i2s_trigger,