From patchwork Tue Nov 3 14:28:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 7542871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E08E9F4F5 for ; Tue, 3 Nov 2015 14:35:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9637C20567 for ; Tue, 3 Nov 2015 14:35:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A69DB2053C for ; Tue, 3 Nov 2015 14:35:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ztcex-0002m9-EY; Tue, 03 Nov 2015 14:34:03 +0000 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZtceP-00026c-5q for linux-arm-kernel@lists.infradead.org; Tue, 03 Nov 2015 14:33:35 +0000 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id tA3EWdL9016272; Tue, 3 Nov 2015 06:32:52 -0800 Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0a-0016f401.pphosted.com with ESMTP id 1xxxs4801k-4 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 03 Nov 2015 06:32:52 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Tue, 3 Nov 2015 06:32:17 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server id 15.0.1044.25 via Frontend Transport; Tue, 3 Nov 2015 06:32:17 -0800 Received: from xhacker.marvell.com (unknown [10.37.135.134]) by maili.marvell.com (Postfix) with ESMTP id 425623F7045; Tue, 3 Nov 2015 06:32:16 -0800 (PST) From: Jisheng Zhang To: , , , Subject: [PATCH v2 1/3] ARM: delay: choose the highest rating delay timer Date: Tue, 3 Nov 2015 22:28:35 +0800 Message-ID: <1446560917-6318-2-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1446560917-6318-1-git-send-email-jszhang@marvell.com> References: <1446560917-6318-1-git-send-email-jszhang@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2015-11-03_08:, , signatures=0 X-Proofpoint-Spam-Details: rule=inbound_notspam policy=inbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310000 definitions=main-1511030248 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151103_063329_633988_233D9CC0 X-CRM114-Status: GOOD ( 15.70 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jisheng Zhang , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In case there are several possible delay timers, we purely base the selection on the frequency, which is suboptimal in some cases. Take one Marvell Berlin platform for example: we have arch timer and dw-apb timer. The arch timer freq is 25MHZ while the dw-apb timer freq is 100MHZ, current selection would choose the dw-apb timer. But the dw apb timer is on the APB bus while arch timer sits in CPU, the cost of accessing the apb timer is higher than the arch timer. This patch introduces rating concept to the delay timer and use it as a primary indication, we fall back to comparing the frequency if the rating is not set or the same. Signed-off-by: Jisheng Zhang --- arch/arm/include/asm/delay.h | 1 + arch/arm/lib/delay.c | 16 +++++++++++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h index dff714d..cb445d7 100644 --- a/arch/arm/include/asm/delay.h +++ b/arch/arm/include/asm/delay.h @@ -18,6 +18,7 @@ struct delay_timer { unsigned long (*read_current_timer)(void); unsigned long freq; + int rating; }; extern struct arm_delay_ops { diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c index 8044591..91cee12 100644 --- a/arch/arm/lib/delay.c +++ b/arch/arm/lib/delay.c @@ -38,6 +38,7 @@ struct arm_delay_ops arm_delay_ops = { static const struct delay_timer *delay_timer; static bool delay_calibrated; static u64 delay_res; +static int delay_rating; int read_current_timer(unsigned long *timer_val) { @@ -78,6 +79,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer) { u32 new_mult, new_shift; u64 res; + bool update_delay_ops = false; clocks_calc_mult_shift(&new_mult, &new_shift, timer->freq, NSEC_PER_SEC, 3600); @@ -89,11 +91,23 @@ void __init register_current_timer_delay(const struct delay_timer *timer) return; } - if (!delay_calibrated && (!delay_res || (res < delay_res))) { + if (!delay_calibrated) { + if (delay_rating && timer->rating && + delay_rating != timer->rating) { + if (timer->rating > delay_rating) + update_delay_ops = true; + } else { + if (!delay_res || (res < delay_res)) + update_delay_ops = true; + } + } + + if (update_delay_ops) { pr_info("Switching to timer-based delay loop, resolution %lluns\n", res); delay_timer = timer; lpj_fine = timer->freq / HZ; delay_res = res; + delay_rating = timer->rating; /* cpufreq may scale loops_per_jiffy, so keep a private copy */ arm_delay_ops.ticks_per_jiffy = lpj_fine;