From patchwork Sun Nov 8 09:26:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7577981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 34F2EC05C6 for ; Sun, 8 Nov 2015 09:29:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 53E502063C for ; Sun, 8 Nov 2015 09:29:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 73F942063B for ; Sun, 8 Nov 2015 09:29:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZvMGS-0008PG-00; Sun, 08 Nov 2015 09:27:56 +0000 Received: from mail-pa0-f52.google.com ([209.85.220.52]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZvMFf-0007p4-KF; Sun, 08 Nov 2015 09:27:09 +0000 Received: by pabfh17 with SMTP id fh17so167467642pab.0; Sun, 08 Nov 2015 01:26:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=asECypNcrWhq0S1G0t3aMNxNvXqLfQDYnL6BIu6g0a0=; b=R/PsN6nJd7RLOiT8XIP66Zm9nQJlU0crbBWIHKzsu3u/g/lzfQVLPQ4Z+/g5oFx3hE 1RbwTb7RnnuEBHabCOn5pEP7QDp4Bib33zOYHQ2mc87KiwYvLb5dWQupZzNA+9PhhBKl 8hHHdG+UKoZw4QEgt8boMhym9PVfINCRAqu8fW84FsjkEajrf8doqMPGSfv0C5jmSSRd WcxgCGvOroirDJwJO7TqRtuV1imEtzEQ5IpkJiTHi0MQD1kdZZ1MUrcCbRiK+8SpWAQ4 u03NGUxGF2wGlgmVMFYYdPEOkTiO8pJyBYci3xr5cblrUOd04kVPR8gEFhvL05aWB8GF /9/w== X-Received: by 10.68.133.133 with SMTP id pc5mr31026902pbb.93.1446974806779; Sun, 08 Nov 2015 01:26:46 -0800 (PST) Received: from localhost.localdomain ([43.226.228.153]) by smtp.gmail.com with ESMTPSA id iy1sm9792100pbb.85.2015.11.08.01.26.43 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 08 Nov 2015 01:26:46 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , Eduardo Valentin Subject: [PATCH v3 05/10] thermal: rockchip: Add the sort flag for adc value increment or decrement Date: Sun, 8 Nov 2015 17:26:03 +0800 Message-Id: <1446974768-25795-6-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1446974768-25795-1-git-send-email-wxt@rock-chips.com> References: <1446974768-25795-1-git-send-email-wxt@rock-chips.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151108_012707_861356_39FB96BB X-CRM114-Status: GOOD ( 16.27 ) X-Spam-Score: -2.4 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Zhang Rui , linux-arm-kernel@lists.infradead.org, Caesar Wang MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The conversion table has the adc value and temperature. In fact, the adc value only has the increment or decrement mode in conversion table. Moment, we can add the sort flag to be better support the *code_to_temp* for differenr SoCs. Signed-off-by: Caesar Wang --- Changes in v3: - rename the flag-> sort_flag. - fix the indentation. - change the pr_err information. Changes in v2: None Changes in v1: None drivers/thermal/rockchip_thermal.c | 68 +++++++++++++++++++++++++++++--------- 1 file changed, 53 insertions(+), 15 deletions(-) diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c index 3116d07..c1ab346 100644 --- a/drivers/thermal/rockchip_thermal.c +++ b/drivers/thermal/rockchip_thermal.c @@ -53,6 +53,16 @@ enum sensor_id { }; /** +* The conversion table has the adc value and temperature. +* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table) +* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table) +*/ +enum sort_flag { + ADC_DECREMENT = 0, + ADC_INCREMENT, +}; + +/** * The max sensors is two in rockchip SoCs. * Two sensors: CPU and GPU sensor. */ @@ -66,6 +76,9 @@ struct chip_tsadc_table { /* that analogic mask data */ u32 data_mask; + + /* the flag is adc value that increment or decrement in table */ + bool sort_flag; }; struct rockchip_tsadc_chip { @@ -223,19 +236,43 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, WARN_ON(table.length < 2); - code &= table.data_mask; - if (code < table.id[high].code) - return -EAGAIN; /* Incorrect reading */ - - while (low <= high) { - if (code >= table.id[mid].code && - code < table.id[mid - 1].code) - break; - else if (code < table.id[mid].code) - low = mid + 1; - else - high = mid - 1; - mid = (low + high) / 2; + switch (table.sort_flag) { + case ADC_DECREMENT: + code &= table.data_mask; + if (code < table.id[high].code) + return -EAGAIN; /* Incorrect reading */ + + while (low <= high) { + if (code >= table.id[mid].code && + code < table.id[mid - 1].code) + break; + else if (code < table.id[mid].code) + low = mid + 1; + else + high = mid - 1; + + mid = (low + high) / 2; + } + break; + case ADC_INCREMENT: + code &= table.data_mask; + if (code < table.id[low].code) + return -EAGAIN; /* Incorrect reading */ + + while (low <= high) { + if (code >= table.id[mid - 1].code && + code < table.id[mid].code) + break; + else if (code > table.id[mid].code) + low = mid + 1; + else + high = mid - 1; + + mid = (low + high) / 2; + } + break; + default: + pr_err("Invalid the conversion table\n"); } /* @@ -245,8 +282,8 @@ static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code, * to produce less granular result. */ num = table.id[mid].temp - v2_code_table[mid - 1].temp; - num *= table.id[mid - 1].code - code; - denom = table.id[mid - 1].code - table.id[mid].code; + num *= abs(table.id[mid - 1].code - code); + denom = abs(table.id[mid - 1].code - table.id[mid].code); *temp = table.id[mid - 1].temp + (num / denom); return 0; @@ -367,6 +404,7 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = { .id = v2_code_table, .length = ARRAY_SIZE(v2_code_table), .data_mask = TSADCV2_DATA_MASK, + .sort_flag = ADC_DECREMENT, }, };