[1/3] ARM: shmobile: r8a7793: Add DMAC devices to DT

Message ID	1447139641-11480-2-git-send-email-horms+renesas@verge.net.au (mailing list archive)
State	New, archived
Headers	show Return-Path: <linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org> From: Simon Horman <horms+renesas@verge.net.au> To: linux-sh@vger.kernel.org Subject: [PATCH 1/3] ARM: shmobile: r8a7793: Add DMAC devices to DT Date: Tue, 10 Nov 2015 16:13:59 +0900 Message-Id: <1447139641-11480-2-git-send-email-horms+renesas@verge.net.au> In-Reply-To: <1447139641-11480-1-git-send-email-horms+renesas@verge.net.au> References: <1447139641-11480-1-git-send-email-horms+renesas@verge.net.au> Precedence: list Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>, Magnus Damm <magnus.damm@gmail.com>, Vladimir Barinov <vladimir.barinov@cogentembedded.com>, Simon Horman <horms+renesas@verge.net.au>, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org

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1447139641-11480-2-git-send-email-horms+renesas@verge.net.au (mailing list archive)

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New, archived

Headers

From: Simon Horman <horms+renesas@verge.net.au>
To: linux-sh@vger.kernel.org
Subject: [PATCH 1/3] ARM: shmobile: r8a7793: Add DMAC devices to DT
Date: Tue, 10 Nov 2015 16:13:59 +0900
Message-Id: <1447139641-11480-2-git-send-email-horms+renesas@verge.net.au>
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Precedence: list
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Vladimir Barinov <vladimir.barinov@cogentembedded.com>,
	Simon Horman <horms+renesas@verge.net.au>,
	linux-arm-kernel@lists.infradead.org
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Commit Message

Simon Horman Nov. 10, 2015, 7:13 a.m. UTC

Instantiate the two system DMA controllers in the r8a7793 device tree.

Based on similar work for the r8a7793 by Laurent Pinchart.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 72 insertions(+)

Comments

Laurent Pinchart Nov. 10, 2015, 9:11 a.m. UTC | #1

Hi Simon,

Thank you for the patch.

On Tuesday 10 November 2015 16:13:59 Simon Horman wrote:
> Instantiate the two system DMA controllers in the r8a7793 device tree.
> 
> Based on similar work for the r8a7793 by Laurent Pinchart.
> 
> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

> ---
>  arch/arm/boot/dts/r8a7793.dtsi | 72 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index 4f6480f8845f..187a82dc7d9f 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -128,6 +128,68 @@
>  		#gpio-range-cells = <3>;
>  	};
> 
> +	dmac0: dma-controller@e6700000 {
> +		compatible = "renesas,rcar-dmac";
> +		reg = <0 0xe6700000 0 0x20000>;
> +		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
> +			      0 200 IRQ_TYPE_LEVEL_HIGH
> +			      0 201 IRQ_TYPE_LEVEL_HIGH
> +			      0 202 IRQ_TYPE_LEVEL_HIGH
> +			      0 203 IRQ_TYPE_LEVEL_HIGH
> +			      0 204 IRQ_TYPE_LEVEL_HIGH
> +			      0 205 IRQ_TYPE_LEVEL_HIGH
> +			      0 206 IRQ_TYPE_LEVEL_HIGH
> +			      0 207 IRQ_TYPE_LEVEL_HIGH
> +			      0 208 IRQ_TYPE_LEVEL_HIGH
> +			      0 209 IRQ_TYPE_LEVEL_HIGH
> +			      0 210 IRQ_TYPE_LEVEL_HIGH
> +			      0 211 IRQ_TYPE_LEVEL_HIGH
> +			      0 212 IRQ_TYPE_LEVEL_HIGH
> +			      0 213 IRQ_TYPE_LEVEL_HIGH
> +			      0 214 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "error",
> +				"ch0", "ch1", "ch2", "ch3",
> +				"ch4", "ch5", "ch6", "ch7",
> +				"ch8", "ch9", "ch10", "ch11",
> +				"ch12", "ch13", "ch14";
> +		clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
> +		clock-names = "fck";
> +		power-domains = <&cpg_clocks>;
> +		#dma-cells = <1>;
> +		dma-channels = <15>;
> +	};
> +
> +	dmac1: dma-controller@e6720000 {
> +		compatible = "renesas,rcar-dmac";
> +		reg = <0 0xe6720000 0 0x20000>;
> +		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
> +			      0 216 IRQ_TYPE_LEVEL_HIGH
> +			      0 217 IRQ_TYPE_LEVEL_HIGH
> +			      0 218 IRQ_TYPE_LEVEL_HIGH
> +			      0 219 IRQ_TYPE_LEVEL_HIGH
> +			      0 308 IRQ_TYPE_LEVEL_HIGH
> +			      0 309 IRQ_TYPE_LEVEL_HIGH
> +			      0 310 IRQ_TYPE_LEVEL_HIGH
> +			      0 311 IRQ_TYPE_LEVEL_HIGH
> +			      0 312 IRQ_TYPE_LEVEL_HIGH
> +			      0 313 IRQ_TYPE_LEVEL_HIGH
> +			      0 314 IRQ_TYPE_LEVEL_HIGH
> +			      0 315 IRQ_TYPE_LEVEL_HIGH
> +			      0 316 IRQ_TYPE_LEVEL_HIGH
> +			      0 317 IRQ_TYPE_LEVEL_HIGH
> +			      0 318 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "error",
> +				"ch0", "ch1", "ch2", "ch3",
> +				"ch4", "ch5", "ch6", "ch7",
> +				"ch8", "ch9", "ch10", "ch11",
> +				"ch12", "ch13", "ch14";
> +		clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
> +		clock-names = "fck";
> +		power-domains = <&cpg_clocks>;
> +		#dma-cells = <1>;
> +		dma-channels = <15>;
> +	};
> +
>  	scif0: serial@e6e60000 {
>  		compatible = "renesas,scif-r8a7793", "renesas,scif";
>  		reg = <0 0xe6e60000 0 64>;
> @@ -313,6 +375,16 @@
>  				"tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
>  				"vsp1-du0", "vsps";
>  		};
> +		mstp2_clks: mstp2_clks@e6150138 {
> +			compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-
clocks";
> +			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
> +			clocks = <&zs_clk>, <&zs_clk>;
> +			#clock-cells = <1>;
> +			clock-indices = <
> +				R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
> +			>;
> +			clock-output-names = "sys-dmac1", "sys-dmac0";
> +		};
>  		mstp3_clks: mstp3_clks@e615013c {
>  			compatible = "renesas,r8a7793-mstp-clocks",
>  				     "renesas,cpg-mstp-clocks";

Magnus Damm Nov. 10, 2015, 4:58 p.m. UTC | #2

Hi Simon,

On Tue, Nov 10, 2015 at 4:13 PM, Simon Horman
<horms+renesas@verge.net.au> wrote:
> Instantiate the two system DMA controllers in the r8a7793 device tree.
>
> Based on similar work for the r8a7793 by Laurent Pinchart.
>
> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
>  arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 72 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> index 4f6480f8845f..187a82dc7d9f 100644
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -128,6 +128,68 @@
>                 #gpio-range-cells = <3>;
>         };
>
> +       dmac0: dma-controller@e6700000 {
> +               compatible = "renesas,rcar-dmac";

Thanks for cooking up this patch. It looks fine to me, but it reminds
me about compat string handling.

Is there any special reason why we don't use the SoC part number in
the compatible string for DMAC devices?

Cheers,

/ magnus

Simon Horman Nov. 12, 2015, 1:24 a.m. UTC | #3

On Wed, Nov 11, 2015 at 01:58:09AM +0900, Magnus Damm wrote:
> Hi Simon,
> 
> On Tue, Nov 10, 2015 at 4:13 PM, Simon Horman
> <horms+renesas@verge.net.au> wrote:
> > Instantiate the two system DMA controllers in the r8a7793 device tree.
> >
> > Based on similar work for the r8a7793 by Laurent Pinchart.
> >
> > Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> > ---
> >  arch/arm/boot/dts/r8a7793.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 72 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
> > index 4f6480f8845f..187a82dc7d9f 100644
> > --- a/arch/arm/boot/dts/r8a7793.dtsi
> > +++ b/arch/arm/boot/dts/r8a7793.dtsi
> > @@ -128,6 +128,68 @@
> >                 #gpio-range-cells = <3>;
> >         };
> >
> > +       dmac0: dma-controller@e6700000 {
> > +               compatible = "renesas,rcar-dmac";
> 
> Thanks for cooking up this patch. It looks fine to me, but it reminds
> me about compat string handling.
> 
> Is there any special reason why we don't use the SoC part number in
> the compatible string for DMAC devices?

Thanks. I will try and resolve that separately to this patchset.

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 4f6480f8845f..187a82dc7d9f 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -128,6 +128,68 @@ 
 		#gpio-range-cells = <3>;
 	};
 
+	dmac0: dma-controller@e6700000 {
+		compatible = "renesas,rcar-dmac";
+		reg = <0 0xe6700000 0 0x20000>;
+		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
+			      0 200 IRQ_TYPE_LEVEL_HIGH
+			      0 201 IRQ_TYPE_LEVEL_HIGH
+			      0 202 IRQ_TYPE_LEVEL_HIGH
+			      0 203 IRQ_TYPE_LEVEL_HIGH
+			      0 204 IRQ_TYPE_LEVEL_HIGH
+			      0 205 IRQ_TYPE_LEVEL_HIGH
+			      0 206 IRQ_TYPE_LEVEL_HIGH
+			      0 207 IRQ_TYPE_LEVEL_HIGH
+			      0 208 IRQ_TYPE_LEVEL_HIGH
+			      0 209 IRQ_TYPE_LEVEL_HIGH
+			      0 210 IRQ_TYPE_LEVEL_HIGH
+			      0 211 IRQ_TYPE_LEVEL_HIGH
+			      0 212 IRQ_TYPE_LEVEL_HIGH
+			      0 213 IRQ_TYPE_LEVEL_HIGH
+			      0 214 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "error",
+				"ch0", "ch1", "ch2", "ch3",
+				"ch4", "ch5", "ch6", "ch7",
+				"ch8", "ch9", "ch10", "ch11",
+				"ch12", "ch13", "ch14";
+		clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC0>;
+		clock-names = "fck";
+		power-domains = <&cpg_clocks>;
+		#dma-cells = <1>;
+		dma-channels = <15>;
+	};
+
+	dmac1: dma-controller@e6720000 {
+		compatible = "renesas,rcar-dmac";
+		reg = <0 0xe6720000 0 0x20000>;
+		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
+			      0 216 IRQ_TYPE_LEVEL_HIGH
+			      0 217 IRQ_TYPE_LEVEL_HIGH
+			      0 218 IRQ_TYPE_LEVEL_HIGH
+			      0 219 IRQ_TYPE_LEVEL_HIGH
+			      0 308 IRQ_TYPE_LEVEL_HIGH
+			      0 309 IRQ_TYPE_LEVEL_HIGH
+			      0 310 IRQ_TYPE_LEVEL_HIGH
+			      0 311 IRQ_TYPE_LEVEL_HIGH
+			      0 312 IRQ_TYPE_LEVEL_HIGH
+			      0 313 IRQ_TYPE_LEVEL_HIGH
+			      0 314 IRQ_TYPE_LEVEL_HIGH
+			      0 315 IRQ_TYPE_LEVEL_HIGH
+			      0 316 IRQ_TYPE_LEVEL_HIGH
+			      0 317 IRQ_TYPE_LEVEL_HIGH
+			      0 318 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "error",
+				"ch0", "ch1", "ch2", "ch3",
+				"ch4", "ch5", "ch6", "ch7",
+				"ch8", "ch9", "ch10", "ch11",
+				"ch12", "ch13", "ch14";
+		clocks = <&mstp2_clks R8A7793_CLK_SYS_DMAC1>;
+		clock-names = "fck";
+		power-domains = <&cpg_clocks>;
+		#dma-cells = <1>;
+		dma-channels = <15>;
+	};
+
 	scif0: serial@e6e60000 {
 		compatible = "renesas,scif-r8a7793", "renesas,scif";
 		reg = <0 0xe6e60000 0 64>;
@@ -313,6 +375,16 @@ 
 				"tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
 				"vsp1-du0", "vsps";
 		};
+		mstp2_clks: mstp2_clks@e6150138 {
+			compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
+			clocks = <&zs_clk>, <&zs_clk>;
+			#clock-cells = <1>;
+			clock-indices = <
+				R8A7793_CLK_SYS_DMAC1 R8A7793_CLK_SYS_DMAC0
+			>;
+			clock-output-names = "sys-dmac1", "sys-dmac0";
+		};
 		mstp3_clks: mstp3_clks@e615013c {
 			compatible = "renesas,r8a7793-mstp-clocks",
 				     "renesas,cpg-mstp-clocks";

[1/3] ARM: shmobile: r8a7793: Add DMAC devices to DT

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