From patchwork Wed Nov 11 22:18:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 7598671 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0EA3C9F1C2 for ; Wed, 11 Nov 2015 22:34:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 23AA3205BA for ; Wed, 11 Nov 2015 22:34:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 428662058A for ; Wed, 11 Nov 2015 22:34:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZwdwU-0004qj-Ng; Wed, 11 Nov 2015 22:32:38 +0000 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZwdkQ-0006H0-RB for linux-arm-kernel@lists.infradead.org; Wed, 11 Nov 2015 22:20:16 +0000 Received: by padhx2 with SMTP id hx2so42989374pad.1 for ; Wed, 11 Nov 2015 14:19:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4RMqLpUru2kkefq6InOsLCqWDIZ7THDFh6NGyu84LDo=; b=NVImrXZvjSK9p+iqfaQeUhxE4Wh+xyvRqYIZDDWANAbPeDkIgZRGsRPuTs+WRcR5u6 SxBfP/kp90n3rwok+qe9Q9gS7SeD0N3VS4RQHhkYOhj6DUwU4M8no/gGOAZJQA/ev9/s zJYtjxjV7cLLBKpFq2xN62rMZoXMSs3LpuT0uMGarroVIP/IVLv3wzS56AHUhur2MPg+ JPxndQcyOk0aOrmP/7TjhEsfGBq61nqY/1NE827oGaDMDz5zfmuIv3AoNRULwAqy6Jqv V9aKlf+964mTDzrdxYigE8LjslTOuOh4csmkq7FlN02wOXEysko6U2jOA/zVrbXOx0HU 8UtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4RMqLpUru2kkefq6InOsLCqWDIZ7THDFh6NGyu84LDo=; b=ZnzNIKkBuVE8V++mJNNn4xBJddx7dejMtj3dn1gOFS80ye/DoZxn/sZSmNRVeywcPc rmnB/sLMe8qGBupWDYQI3yebcazYcIZn2uH7wd0LInUXghIl4jT4BHmT5vpmPW48dNDt lP+YRVygVYxa5kZE5MUPBOMCJ0lhBE+V97SAqwhe+aa5Sj/fWzsP1pUOUok06QvjK9Fj 3GtB2NTK0AoYb5UtP21Vrhq++QkHqmvP373IUMHdxnshNx87Z0z1qPh0lakLPiSYoHgG vMx94kHNu9/bi6E/fexuj9SW9NbffZXNF+kn4kahGNhN3YIKi+r76nGoj19+8sOx5Ka2 P/cg== X-Gm-Message-State: ALoCoQn6ooZThtZ3HkG3qAi67mxATLltZdz/GXQMsck40ZKQ+NsMaXJZAmno3zGUJKzHWO9npEv0 X-Received: by 10.68.200.103 with SMTP id jr7mr18088237pbc.77.1447280393741; Wed, 11 Nov 2015 14:19:53 -0800 (PST) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id h10sm11156697pat.7.2015.11.11.14.19.52 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Nov 2015 14:19:53 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org Subject: [PATCH V3 21/26] coresight: introducing a global trace ID function Date: Wed, 11 Nov 2015 15:18:11 -0700 Message-Id: <1447280296-19147-22-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447280296-19147-1-git-send-email-mathieu.poirier@linaro.org> References: <1447280296-19147-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151111_142011_303908_23F7B884 X-CRM114-Status: GOOD ( 14.61 ) X-Spam-Score: -2.6 (--) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, mathieu.poirier@linaro.org, pawel.moll@arm.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, fainelli@broadcom.com, adrian.hunter@intel.com, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP TraceID values have to be unique for all tracers and consistent between drivers and user space. As such introducing a central function to be used whenever a traceID value is required. The patch also account for data traceIDs, which are usually I(N) + 1. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm3x.c | 7 ++----- include/linux/coresight-pmu.h | 12 ++++++++++++ 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index c07b7d3eee86..ebd569986bd4 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -784,11 +785,7 @@ static void etm_init_arch_data(void *info) static void etm_init_trace_id(struct etm_drvdata *drvdata) { - /* - * A trace ID of value 0 is invalid, so let's start at some - * random value that fits in 7 bits and go from there. - */ - drvdata->traceid = 0x10 + drvdata->cpu; + drvdata->traceid = coresight_get_trace_id(drvdata->cpu); } static int etm_probe(struct amba_device *adev, const struct amba_id *id) diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 6c5386b23b10..7d410260661b 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -19,9 +19,21 @@ #define _LINUX_CORESIGHT_PMU_H #define CORESIGHT_ETM_PMU_NAME "cs_etm" +#define CORESIGHT_ETM_PMU_SEED 0x10 /* ETMv3.5/PTM's ETMCR config bit */ #define ETM_OPT_CYCACC 12 #define ETM_OPT_TS 28 +static inline int coresight_get_trace_id(int cpu) +{ + /* + * A trace ID of value 0 is invalid, so let's start at some + * random value that fits in 7 bits and go from there. Since + * the common convention is to have data trace IDs be I(N) + 1, + * set instruction trace IDs as a function of the CPU number. + */ + return (CORESIGHT_ETM_PMU_SEED + (cpu * 2)); +} + #endif